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[71.212.47.143]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-73e25a9fd26sm8432260b3a.151.2025.04.28.13.14.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 28 Apr 2025 13:14:01 -0700 (PDT) Message-ID: <1f6c0738-6bbe-4608-956e-d94ca89b53d0@linaro.org> Date: Mon, 28 Apr 2025 13:13:59 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 11/13] physmem: Restrict TCG IOTLB code to TCG accel To: Anton Johansson , =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= Cc: qemu-devel@nongnu.org, Paolo Bonzini , Pierrick Bouvier References: <20250424202412.91612-1-philmd@linaro.org> <20250424202412.91612-12-philmd@linaro.org> Content-Language: en-US From: Richard Henderson In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 4/28/25 11:51, Anton Johansson wrote: > On 24/04/25, Philippe Mathieu-Daudé wrote: >> Restrict iotlb_to_section(), address_space_translate_for_iotlb() >> and memory_region_section_get_iotlb() to TCG. Declare them in >> the new "accel/tcg/iommu.h" header. Declare iotlb_to_section() >> using the MemoryRegionSection typedef. >> >> Signed-off-by: Philippe Mathieu-Daudé >> --- >> MAINTAINERS | 2 +- >> include/accel/tcg/iommu.h | 41 +++++++++++++++++++++++++++++++++++++++ >> include/exec/exec-all.h | 26 ------------------------- >> accel/tcg/cputlb.c | 1 + >> system/physmem.c | 5 +++++ >> 5 files changed, 48 insertions(+), 27 deletions(-) >> create mode 100644 include/accel/tcg/iommu.h >> >> diff --git a/MAINTAINERS b/MAINTAINERS >> index 661a47db5ac..3a37cc73af7 100644 >> --- a/MAINTAINERS >> +++ b/MAINTAINERS >> @@ -168,7 +168,7 @@ F: include/exec/helper*.h.inc >> F: include/exec/helper-info.c.inc >> F: include/exec/page-protection.h >> F: include/system/tcg.h >> -F: include/accel/tcg/cpu-ops.h >> +F: include/accel/tcg/ >> F: host/include/*/host/cpuinfo.h >> F: util/cpuinfo-*.c >> F: include/tcg/ >> diff --git a/include/accel/tcg/iommu.h b/include/accel/tcg/iommu.h >> new file mode 100644 >> index 00000000000..90cfd6c0ed1 >> --- /dev/null >> +++ b/include/accel/tcg/iommu.h >> @@ -0,0 +1,41 @@ >> +/* >> + * TCG IOMMU translations. >> + * >> + * Copyright (c) 2003 Fabrice Bellard >> + * SPDX-License-Identifier: LGPL-2.1-or-later >> + */ >> +#ifndef ACCEL_TCG_IOMMU_H >> +#define ACCEL_TCG_IOMMU_H >> + >> +#ifdef CONFIG_USER_ONLY >> +#error Cannot include accel/tcg/iommu.h from user emulation >> +#endif >> + >> +#include "exec/hwaddr.h" >> +#include "exec/memattrs.h" > > Missing qemu/typedefs.h include No, that's always done by qemu/osdep.h in the c file. r~