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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b41904sm278851035e9.37.2024.12.26.14.48.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 26 Dec 2024 14:48:44 -0800 (PST) Message-ID: <1f72e77a-5da9-4119-8e92-a707552f856f@linaro.org> Date: Thu, 26 Dec 2024 23:48:42 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 06/23] target/loongarch: Store some uint64_t values as target_ulong To: Jiaxun Yang , qemu-devel@nongnu.org Cc: Song Gao , Bibo Mao , Eric Blake , Markus Armbruster , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang , Zhao Liu , Paolo Bonzini References: <20241226-la32-fixes1-v2-0-0414594f8cb5@flygoat.com> <20241226-la32-fixes1-v2-6-0414594f8cb5@flygoat.com> Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20241226-la32-fixes1-v2-6-0414594f8cb5@flygoat.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 26/12/24 22:19, Jiaxun Yang wrote: > Store internal registers including GPRs, CSRs, and LBT scratchs > as target_ulong, as per architecture specification. > > The only exception here is tlb_misc, as it's only used by QEMU > internally and need keep to be 64bit to store all required fields. > > There is no migration ABI change, as target_ulong is uint64_t on > existing loongarch64 builds anyway. I'm working on a prototype series where target_ulong becomes uint64_t under TCG. This patch is going the opposite direction. Not sure what to say at this point (I'm not rejecting it, just wondering). > > Signed-off-by: Jiaxun Yang > --- > target/loongarch/cpu.c | 34 ++++++------ > target/loongarch/cpu.h | 132 ++++++++++++++++++++++----------------------- > target/loongarch/machine.c | 120 ++++++++++++++++++++--------------------- > 3 files changed, 143 insertions(+), 143 deletions(-)