From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Anton Johansson <anjo@rev.ng>, qemu-devel@nongnu.org
Cc: pierrick.bouvier@linaro.org, alistair.francis@wdc.com,
richard.henderson@linaro.org, palmer@dabbelt.com
Subject: Re: [PATCH 1/5] hw/riscv: Use generic hwaddr for firmware addressses
Date: Wed, 15 Oct 2025 16:21:36 +0200 [thread overview]
Message-ID: <1f8876eb-9e57-4102-8d04-3de29c4832f9@linaro.org> (raw)
In-Reply-To: <20251015-feature-single-binary-hw-v1-v1-1-8b416eda42cf@rev.ng>
On 15/10/25 15:27, Anton Johansson wrote:
> Signed-off-by: Anton Johansson <anjo@rev.ng>
> ---
> include/hw/riscv/boot.h | 20 ++++++++++----------
> hw/riscv/boot.c | 22 +++++++++++-----------
> hw/riscv/microchip_pfsoc.c | 2 +-
> hw/riscv/sifive_u.c | 2 +-
> hw/riscv/spike.c | 4 ++--
> hw/riscv/virt.c | 2 +-
> 6 files changed, 26 insertions(+), 26 deletions(-)
>
> diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h
> index 7d59b2e6c6..d835594baa 100644
> --- a/include/hw/riscv/boot.h
> +++ b/include/hw/riscv/boot.h
> @@ -43,21 +43,21 @@ bool riscv_is_32bit(RISCVHartArrayState *harts);
> char *riscv_plic_hart_config_string(int hart_count);
>
> void riscv_boot_info_init(RISCVBootInfo *info, RISCVHartArrayState *harts);
> -target_ulong riscv_calc_kernel_start_addr(RISCVBootInfo *info,
> - target_ulong firmware_end_addr);
> -target_ulong riscv_find_and_load_firmware(MachineState *machine,
> - const char *default_machine_firmware,
> - hwaddr *firmware_load_addr,
> - symbol_fn_t sym_cb);
> +hwaddr riscv_calc_kernel_start_addr(RISCVBootInfo *info,
> + hwaddr firmware_end_addr);
> +hwaddr riscv_find_and_load_firmware(MachineState *machine,
> + const char *default_machine_firmware,
> + hwaddr *firmware_load_addr,
> + symbol_fn_t sym_cb);
> const char *riscv_default_firmware_name(RISCVHartArrayState *harts);
> char *riscv_find_firmware(const char *firmware_filename,
> const char *default_machine_firmware);
> -target_ulong riscv_load_firmware(const char *firmware_filename,
> - hwaddr *firmware_load_addr,
> - symbol_fn_t sym_cb);
> +hwaddr riscv_load_firmware(const char *firmware_filename,
> + hwaddr *firmware_load_addr,
> + symbol_fn_t sym_cb);
> void riscv_load_kernel(MachineState *machine,
> RISCVBootInfo *info,
> - target_ulong kernel_start_addr,
> + hwaddr kernel_start_addr,
vaddr?
> bool load_initrd,
> symbol_fn_t sym_cb);
next prev parent reply other threads:[~2025-10-15 14:23 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-15 13:27 [PATCH 0/5] single-binary: Prepare hw/riscv for single compilation Anton Johansson via
2025-10-15 13:27 ` [PATCH 1/5] hw/riscv: Use generic hwaddr for firmware addressses Anton Johansson via
2025-10-15 14:21 ` Philippe Mathieu-Daudé [this message]
2025-10-23 17:14 ` Anton Johansson via
2025-10-23 17:55 ` Philippe Mathieu-Daudé
2025-10-15 13:27 ` [PATCH 2/5] hw/riscv: Replace target_ulong uses Anton Johansson via
2025-10-15 14:22 ` Philippe Mathieu-Daudé
2025-10-15 16:31 ` Richard Henderson
2025-10-15 16:50 ` Philippe Mathieu-Daudé
2025-10-15 13:27 ` [PATCH 3/5] hw/riscv: Widen OpenSBI dynamic info struct Anton Johansson via
2025-10-16 23:42 ` Alistair Francis
2025-10-15 13:27 ` [PATCH 4/5] target-info: Introduce runtime TARGET_PHYS_ADDR_SPACE_BITS Anton Johansson via
2025-10-15 14:32 ` Philippe Mathieu-Daudé
2025-10-17 16:11 ` Anton Johansson via
2025-10-17 18:47 ` Richard Henderson
2025-10-18 2:34 ` Bibo Mao
2025-10-15 13:27 ` [PATCH 5/5] hw/riscv: Use runtime target_phys_addr_space_bits() Anton Johansson via
2025-10-16 23:43 ` Alistair Francis
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