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[83.59.162.106]) by smtp.gmail.com with ESMTPSA id z13sm2210848wro.97.2020.10.07.03.36.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 07 Oct 2020 03:36:09 -0700 (PDT) Subject: Re: [PULL 19/33] mips/cps: Use start-powered-off CPUState property To: =?UTF-8?Q?Alex_Benn=c3=a9e?= , David Gibson References: <20200908051953.1616885-1-david@gibson.dropbear.id.au> <20200908051953.1616885-20-david@gibson.dropbear.id.au> <87h7r61j1j.fsf@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: <1ffe5f96-be5e-f151-a1fe-7c9f4f765b4d@amsat.org> Date: Wed, 7 Oct 2020 12:36:08 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 MIME-Version: 1.0 In-Reply-To: <87h7r61j1j.fsf@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::342; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x342.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, danielhb413@gmail.com, groug@kaod.org, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, bauerman@linux.ibm.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 10/7/20 11:28 AM, Alex Bennée wrote: > > David Gibson writes: > >> From: Thiago Jung Bauermann >> >> Instead of setting CPUState::halted to 1 in main_cpu_reset(), use the >> start-powered-off property which makes cpu_common_reset() initialize it >> to 1 in common code. >> >> Also change creation of CPU object from cpu_create() to object_new() and >> qdev_realize_and_unref() because cpu_create() realizes the CPU and it's not >> possible to set a property after the object is realized. >> >> Signed-off-by: Thiago Jung Bauermann >> Message-Id: <20200826055535.951207-6-bauerman@linux.ibm.com> >> Reviewed-by: Philippe Mathieu-Daudé >> Signed-off-by: David Gibson > > I've finally bisected the breakage in check-acceptance to this patch: > > 10:24:09 [alex.bennee@hackbox2:~/l/q/b/bisect] (102ca966…)|BISECTING|✔ + ./tests/venv/bin/avocado run tests/acceptance/machine_mips_malta.py > /home/alex.bennee/lsrc/qemu.git/builds/bisect/tests/venv/lib/python3.6/site-packages/avocado/plugins/run.py:214: FutureWarning: The following arguments will be changed to boolean soon: sysinfo, output-check, failfast, keep-tmp and ignore-missing-references. > FutureWarning) > JOB ID : 1a71a0a81cf9fb9a387d2ab105f8196a26cab84e > JOB LOG : /home/alex.bennee/avocado/job-results/job-2020-10-07T10.24-1a71a0a/job.log > (1/3) tests/acceptance/machine_mips_malta.py:MaltaMachineFramebuffer.test_mips_malta_i6400_framebuffer_logo_1core: PASS (5.70 s) > (2/3) tests/acceptance/machine_mips_malta.py:MaltaMachineFramebuffer.test_mips_malta_i6400_framebuffer_logo_7cores: INTERRUPTED: Test interrupted by SIGTERM\nRunner error occurred: Timeout reached\nOriginal status: ERROR\n{'name': '2-tests/acceptance/machine_mips_malta.py:MaltaMachineFramebuffer.test_mips_malta_i6400_framebuffer_logo_7cores', > 'logdir': '/home/alex.bennee/avocado/job-r... (28.91 s) > (3/3) tests/acceptance/machine_mips_malta.py:MaltaMachineFramebuffer.test_mips_malta_i6400_framebuffer_logo_8cores: INTERRUPTED: Test interrupted by SIGTERM\nRunner error occurred: Timeout reached\nOriginal status: ERROR\n{'name': '3-tests/acceptance/machine_mips_malta.py:MaltaMachineFramebuffer.test_mips_malta_i6400_framebuffer_logo_8cores', > 'logdir': '/home/alex.bennee/avocado/job-r... (30.58 s) > RESULTS : PASS 1 | ERROR 0 | FAIL 0 | SKIP 0 | WARN 0 | INTERRUPT 2 | CANCEL 0 > JOB TIME : 70.12 s > 10:25:27 [alex.bennee@hackbox2:~/l/q/b/bisect] (102ca966…)|BISECTING|✔ 8 + make -j30 > make[1]: Entering directory '/home/alex.bennee/lsrc/qemu.git/slirp' > make[1]: Nothing to be done for 'all'. > make[1]: Leaving directory '/home/alex.bennee/lsrc/qemu.git/slirp' > Generating qemu-version.h with a meson_exe.py custom command > Compiling C object libqemu-mips64el-softmmu.fa.p/hw_mips_cps.c.o > Compiling C object libqemu-mips64-softmmu.fa.p/hw_mips_cps.c.o > Compiling C object libqemu-mipsel-softmmu.fa.p/hw_mips_cps.c.o > Compiling C object libqemu-mips-softmmu.fa.p/hw_mips_cps.c.o > Linking target qemu-system-mips > Linking target qemu-system-mips64el > Linking target qemu-system-mips64 > Linking target qemu-system-mipsel > 10:26:26 [alex.bennee@hackbox2:~/l/q/b/bisect] (a2c93f06…)|BISECTING|✔ + ./tests/venv/bin/avocado run tests/acceptance/machine_mips_malta.py > /home/alex.bennee/lsrc/qemu.git/builds/bisect/tests/venv/lib/python3.6/site-packages/avocado/plugins/run.py:214: FutureWarning: The following arguments will be changed to boolean soon: sysinfo, output-check, failfast, keep-tmp and ignore-missing-references. > FutureWarning) > JOB ID : ccf294ef4e5ebdf19b3a0b53479d574df4ea54ea > JOB LOG : /home/alex.bennee/avocado/job-results/job-2020-10-07T10.26-ccf294e/job.log > (1/3) tests/acceptance/machine_mips_malta.py:MaltaMachineFramebuffer.test_mips_malta_i6400_framebuffer_logo_1core: PASS (5.82 s) > (2/3) tests/acceptance/machine_mips_malta.py:MaltaMachineFramebuffer.test_mips_malta_i6400_framebuffer_logo_7cores: PASS (15.16 s) > (3/3) tests/acceptance/machine_mips_malta.py:MaltaMachineFramebuffer.test_mips_malta_i6400_framebuffer_logo_8cores: PASS (15.97 s) > RESULTS : PASS 3 | ERROR 0 | FAIL 0 | SKIP 0 | WARN 0 | INTERRUPT 0 | CANCEL 0 > JOB TIME : 40.01 s Using: -- >8 -- diff --git a/hw/misc/mips_cpc.c b/hw/misc/mips_cpc.c index 2f7b2c9592..7c11fb3d44 100644 --- a/hw/misc/mips_cpc.c +++ b/hw/misc/mips_cpc.c @@ -38,6 +38,7 @@ static void mips_cpu_reset_async_work(CPUState *cs, run_on_cpu_data data) MIPSCPCState *cpc = (MIPSCPCState *) data.host_ptr; cpu_reset(cs); + cs->halted = 0; cpc->vp_running |= 1ULL << cs->cpu_index; } --- RESULTS : PASS 3 | ERROR 0 | FAIL 0 | SKIP 0 | WARN 0 | INTERRUPT 0 | JOB TIME : 37.54 s > >> --- >> hw/mips/cps.c | 15 +++++++++++---- >> 1 file changed, 11 insertions(+), 4 deletions(-) >> >> diff --git a/hw/mips/cps.c b/hw/mips/cps.c >> index 615e1a1ad2..23c0f87e41 100644 >> --- a/hw/mips/cps.c >> +++ b/hw/mips/cps.c >> @@ -52,9 +52,6 @@ static void main_cpu_reset(void *opaque) >> CPUState *cs = CPU(cpu); >> >> cpu_reset(cs); >> - >> - /* All VPs are halted on reset. Leave powering up to CPC. */ >> - cs->halted = 1; >> } >> >> static bool cpu_mips_itu_supported(CPUMIPSState *env) >> @@ -76,7 +73,17 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) >> bool saar_present = false; >> >> for (i = 0; i < s->num_vp; i++) { >> - cpu = MIPS_CPU(cpu_create(s->cpu_type)); >> + cpu = MIPS_CPU(object_new(s->cpu_type)); >> + >> + /* All VPs are halted on reset. Leave powering up to CPC. */ >> + if (!object_property_set_bool(OBJECT(cpu), "start-powered-off", true, >> + errp)) { >> + return; >> + } >> + >> + if (!qdev_realize_and_unref(DEVICE(cpu), NULL, errp)) { >> + return; >> + } >> >> /* Init internal devices */ >> cpu_mips_irq_init_cpu(cpu); > >