*** ne2000.orig.c	Sat Mar 27 10:24:32 2004
--- ne2000.c	Sat Mar 27 10:07:00 2004
***************
*** 123,129 ****
  #define ENTSR_CDH 0x40	/* The collision detect "heartbeat" signal was lost. */
  #define ENTSR_OWC 0x80  /* There was an out-of-window collision. */
  
! #define NE2000_MEM_SIZE 32768
  
  typedef struct NE2000State {
      uint8_t cmd;
--- 123,134 ----
  #define ENTSR_CDH 0x40	/* The collision detect "heartbeat" signal was lost. */
  #define ENTSR_OWC 0x80  /* There was an out-of-window collision. */
  
! //#define NE2000_MEM_SIZE 32768
! //#define NE2000_MEM_SIZE 65536
! #define NE2000_PMEM_SIZE    (32*1024)
! #define NE2000_PMEM_START   (16*1024)
! #define NE2000_PMEM_END     (NE2000_PMEM_SIZE+NE2000_PMEM_START)
! #define NE2000_MEM_SIZE     NE2000_PMEM_END
  
  typedef struct NE2000State {
      uint8_t cmd;
***************
*** 260,265 ****
--- 265,271 ----
          /* control register */
          s->cmd = val;
          if (val & E8390_START) {
+             s->isr &= ~ENISR_RESET;
              /* test specific case: zero length transfert */
              if ((val & (E8390_RREAD | E8390_RWRITE)) &&
                  s->rcnt == 0) {
***************
*** 316,322 ****
              s->dcfg = val;
              break;
          case EN0_ISR:
!             s->isr &= ~val;
              ne2000_update_irq(s);
              break;
          case EN1_PHYS ... EN1_PHYS + 5:
--- 322,328 ----
              s->dcfg = val;
              break;
          case EN0_ISR:
!             s->isr &= ~(val & 0x7f);
              ne2000_update_irq(s);
              break;
          case EN1_PHYS ... EN1_PHYS + 5:
***************
*** 353,358 ****
--- 359,370 ----
          case EN0_ISR:
              ret = s->isr;
              break;
+ 	case EN0_RSARLO:
+ 	    ret = s->rsar & 0x00ff;
+ 	    break;
+ 	case EN0_RSARHI:
+ 	    ret = s->rsar >> 8;
+ 	    break;
          case EN1_PHYS ... EN1_PHYS + 5:
              ret = s->phys[offset - EN1_PHYS];
              break;
***************
*** 363,368 ****
--- 375,381 ----
              ret = s->mult[offset - EN1_MULT];
              break;
          default:
+ 	    /* printf("not implemented\n"); RD*/
              ret = 0x00;
              break;
          }
***************
*** 379,398 ****
      uint8_t *p;
  
  #ifdef DEBUG_NE2000
!     printf("NE2000: asic write val=0x%04x\n", val);
  #endif
      p = s->mem + s->rsar;
!     if (s->dcfg & 0x01) {
!         /* 16 bit access */
!         p[0] = val;
!         p[1] = val >> 8;
!         s->rsar += 2;
!         s->rcnt -= 2;
      } else {
!         /* 8 bit access */
!         p[0] = val;
!         s->rsar++;
!         s->rcnt--;
      }
      /* wrap */
      if (s->rsar == s->stop)
--- 392,418 ----
      uint8_t *p;
  
  #ifdef DEBUG_NE2000
!     printf("NE2000: asic write addr=%x rsar=%x val=0x%04x\n", addr, s->rsar, val);
  #endif
      p = s->mem + s->rsar;
!     if (s->rcnt == 0)
! 	    return;
!     if (s->rsar < 32 || (s->rsar >= NE2000_PMEM_START && s->rsar < NE2000_MEM_SIZE)) { /*RD*/
! 	    if (s->dcfg & 0x01) {
! 		    /* 16 bit access */
! 		    p[0] = val;
! 		    p[1] = val >> 8;
! 		    s->rsar += 2;
! 		    s->rcnt -= 2;
! 	    } else {
! 		    /* 8 bit access */
! 		    p[0] = val;
! 		    s->rsar++;
! 		    s->rcnt--;
! 	    }
      } else {
! 	    s->rcnt=0; /*RD*/
! 	    s->rsar += 1 + (s->dcfg & 0x01);
      }
      /* wrap */
      if (s->rsar == s->stop)
***************
*** 411,426 ****
      int ret;
  
      p = s->mem + s->rsar;
!     if (s->dcfg & 0x01) {
!         /* 16 bit access */
!         ret = p[0] | (p[1] << 8);
!         s->rsar += 2;
!         s->rcnt -= 2;
      } else {
!         /* 8 bit access */
!         ret = p[0];
!         s->rsar++;
!         s->rcnt--;
      }
      /* wrap */
      if (s->rsar == s->stop)
--- 431,451 ----
      int ret;
  
      p = s->mem + s->rsar;
!     if (s->rsar < 32 || (s->rsar >= NE2000_PMEM_START && s->rsar < NE2000_MEM_SIZE)) { /*RD*/
! 	    if (s->dcfg & 0x01) {
! 		    /* 16 bit access */
! 		    ret = p[0] | (p[1] << 8);
! 		    s->rsar += 2;
! 		    s->rcnt -= 2;
! 	    } else {
! 		    /* 8 bit access */
! 		    ret = p[0];
! 		    s->rsar++;
! 		    s->rcnt--;
! 	    }
      } else {
! 	    s->rsar += 1 + (s->dcfg & 0x01); 
! 	    ret = 0x00ff; /*RD*/
      }
      /* wrap */
      if (s->rsar == s->stop)
***************
*** 431,437 ****
          ne2000_update_irq(s);
      }
  #ifdef DEBUG_NE2000
!     printf("NE2000: asic read val=0x%04x\n", ret);
  #endif
      return ret;
  }
--- 456,462 ----
          ne2000_update_irq(s);
      }
  #ifdef DEBUG_NE2000
!     printf("NE2000: asic read addr=%x rsar=%x val=0x%04x\n", addr, s->rsar, ret);
  #endif
      return ret;
  }