Re: [Qemu-devel] QEMU 0.5.3 release

[art yerkes <ayerkes@speakeasy.net>]

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On Sun, 18 Apr 2004 19:58:03 +0200
"J. Mayer" <l_indien@magic.fr> wrote:

> On Tue, 2004-04-13 at 18:00, Martin Garton wrote:
> > On Sun, 4 Apr 2004, Fabrice Bellard wrote:
> > 
> > >    - initial x86-64 host support (Gwenole Beauchesne)
> > 
> > Does this mean it will soon be possible to compile and run qemu on amd64
> > emulating x86?
> > 
> > Or is there still a lot to do?
> 
> There are some assumptions in softmmu that addresses are 32 bits long. I
> sent a patch to Fabrice to handle those problems:
> I'm now able to launch PPC system emulation on an Athlon64.
> I cannot test user emulation, for now, because it doesn't link. It seems
> that the linker script assumes to be on an opteron, not an Athlon64 (the
> Athlon64 MMU is only 48 bits...) but I didn't tried to fix it for now.

It turns out that the mmu assumption is fairly easy to fix...  Basically,
since qemu uses addend in the tlb struct to address either a host or guest
address, addend must be void *, along with everything in its path.

This patch allows the mmu to succeed, but the actual instructions have the
same problem (32 bit host address assumption).  More work is needed for
full support.  Maybe we and other interested users can help make this work.
On my amd64, I can use qemu compiled 32bit, but there seem to be bugs
initializing the virtual ethernet, which I need.
-- 
IBM had little or no expertise on Intel processors.
 -- paragraph 54, SCO v IBM, second amended complaint
No matter how cynical you become, it's never enough to keep up.
 -- Lily Tomlin

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? arm-user
? config-host.h
? config-host.mak
? dyngen
? i386
? i386-softmmu
? i386-user
? ppc-user
? qemu-doc.html
? qemu-mkcow
? qemu-tech.html
? qemu.1
? qemu.diff
? sparc-user
Index: Makefile.target
===================================================================
RCS file: /cvsroot/qemu/qemu/Makefile.target,v
retrieving revision 1.25
diff -u -r1.25 Makefile.target
--- Makefile.target	12 Apr 2004 20:39:28 -0000	1.25
+++ Makefile.target	19 Apr 2004 13:04:29 -0000
@@ -5,9 +5,9 @@
 DEFINES=-I. -I$(TARGET_PATH) -I$(SRC_PATH)
 ifdef CONFIG_USER_ONLY
 VPATH+=:$(SRC_PATH)/linux-user
-DEFINES+=-I$(SRC_PATH)/linux-user -I$(SRC_PATH)/linux-user/$(TARGET_ARCH)
+DEFINES+=-I$(SRC_PATH)/linux-user -I$(SRC_PATH)/linux-user/$(TARGET_ARCH) -DDEBUG_MMU
 endif
-CFLAGS=-Wall -O2 -g
+CFLAGS=-Wall -g -ffixed-rbp
 LDFLAGS=-g
 LIBS=
 HELPER_CFLAGS=$(CFLAGS)
Index: cpu-defs.h
===================================================================
RCS file: /cvsroot/qemu/qemu/cpu-defs.h,v
retrieving revision 1.5
diff -u -r1.5 cpu-defs.h
--- cpu-defs.h	21 Mar 2004 17:06:25 -0000	1.5
+++ cpu-defs.h	19 Apr 2004 13:04:29 -0000
@@ -66,7 +66,8 @@
     */
     uint32_t address; 
     /* addend to virtual address to get physical address */
-    uint32_t addend; 
+    /* Note: The physical address may be in host space */
+    char *addend; 
 } CPUTLBEntry;
 
 #endif
Index: dyngen-exec.h
===================================================================
RCS file: /cvsroot/qemu/qemu/dyngen-exec.h,v
retrieving revision 1.10
diff -u -r1.10 dyngen-exec.h
--- dyngen-exec.h	21 Mar 2004 17:06:25 -0000	1.10
+++ dyngen-exec.h	19 Apr 2004 13:04:29 -0000
@@ -25,12 +25,16 @@
 typedef unsigned char uint8_t;
 typedef unsigned short uint16_t;
 typedef unsigned int uint32_t;
+#if !defined(__x86_64__)
 typedef unsigned long long uint64_t;
+#endif
 
 typedef signed char int8_t;
 typedef signed short int16_t;
 typedef signed int int32_t;
+#if !defined(__x86_64__)
 typedef signed long long int64_t;
+#endif
 
 #define INT8_MIN		(-128)
 #define INT16_MIN		(-32767-1)
@@ -45,9 +49,15 @@
 #define UINT32_MAX		(4294967295U)
 #define UINT64_MAX		((uint64_t)(18446744073709551615))
 
+#ifndef __FILE__DEF
+#if 0
 typedef struct FILE FILE;
 extern int fprintf(FILE *, const char *, ...);
 extern int printf(const char *, ...);
+#else
+#include <stdio.h>
+#endif
+#endif/*__FILE__DEF*/
 #undef NULL
 #define NULL 0
 #include <fenv.h>
Index: exec-all.h
===================================================================
RCS file: /cvsroot/qemu/qemu/exec-all.h,v
retrieving revision 1.17
diff -u -r1.17 exec-all.h
--- exec-all.h	12 Apr 2004 20:39:28 -0000	1.17
+++ exec-all.h	19 Apr 2004 13:04:29 -0000
@@ -32,7 +32,7 @@
 #define __builtin_expect(x, n) (x)
 #endif
 
-#ifdef __i386__
+#if defined(__i386__) && !defined(__x86_64__)
 #define REGPARM(n) __attribute((regparm(n)))
 #else
 #define REGPARM(n)
Index: exec.c
===================================================================
RCS file: /cvsroot/qemu/qemu/exec.c,v
retrieving revision 1.30
diff -u -r1.30 exec.c
--- exec.c	12 Apr 2004 20:39:28 -0000	1.30
+++ exec.c	19 Apr 2004 13:04:29 -0000
@@ -1342,7 +1342,8 @@
     target_ulong pd;
     TranslationBlock *first_tb;
     unsigned int index;
-    target_ulong address, addend;
+    target_ulong address;
+    char *addend;
     int ret;
 
     p = page_find(paddr >> TARGET_PAGE_BITS);
@@ -1370,7 +1371,7 @@
         } else {
             /* standard memory */
             address = vaddr;
-            addend = (unsigned long)phys_ram_base + (pd & TARGET_PAGE_MASK);
+            addend = (void *)phys_ram_base + (pd & TARGET_PAGE_MASK);
         }
         
         index = (vaddr >> 12) & (CPU_TLB_SIZE - 1);
Index: softmmu_header.h
===================================================================
RCS file: /cvsroot/qemu/qemu/softmmu_header.h,v
retrieving revision 1.6
diff -u -r1.6 softmmu_header.h
--- softmmu_header.h	4 Jan 2004 23:56:24 -0000	1.6
+++ softmmu_header.h	19 Apr 2004 13:04:29 -0000
@@ -122,7 +122,7 @@
                   "m" (*(uint32_t *)offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
                   "i" (CPU_MEM_INDEX),
                   "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
-                  : "%eax", "%ecx", "%edx", "memory", "cc");
+                  : "%eax", "%ecx", "%edx", "memory", "cc");    
     return res;
 }
 
Index: softmmu_template.h
===================================================================
RCS file: /cvsroot/qemu/qemu/softmmu_template.h,v
retrieving revision 1.7
diff -u -r1.7 softmmu_template.h
--- softmmu_template.h	6 Feb 2004 19:46:14 -0000	1.7
+++ softmmu_template.h	19 Apr 2004 13:04:29 -0000
@@ -17,6 +17,12 @@
  * License along with this library; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
+
+#ifndef __FILE__DEF
+#define __FILE__DEF
+#include <stdio.h>
+#endif/*__FILE__DEF*/
+
 #define DATA_SIZE (1 << SHIFT)
 
 #if DATA_SIZE == 8
@@ -94,8 +100,8 @@
 {
     DATA_TYPE res;
     int index;
-    unsigned long physaddr, tlb_addr;
-    void *retaddr;
+    unsigned long tlb_addr;
+    void *retaddr, *physaddr;
     
     /* test if there is match for unaligned or IO access */
     /* XXX: could done more in memory macro in a non portable way */
Index: vl.c
===================================================================
RCS file: /cvsroot/qemu/qemu/vl.c,v
retrieving revision 1.59
diff -u -r1.59 vl.c
--- vl.c	12 Apr 2004 20:39:28 -0000	1.59
+++ vl.c	19 Apr 2004 13:04:29 -0000
@@ -358,7 +358,20 @@
     return val;
 }
 
+#elif defined(__x86_64__)
+
+int64_t cpu_get_real_ticks(void)
+{
+    uint32_t low,high;
+    int64_t val;
+    asm volatile("rdtsc" : "=a" (low), "=d" (high));
+    val = high;
+    val <<= 32;
+    val |= low;
+    return val;
+}
+
 #else
 #error unsupported CPU
 #endif
Index: target-i386/exec.h
===================================================================
RCS file: /cvsroot/qemu/qemu/target-i386/exec.h,v
retrieving revision 1.10
diff -u -r1.10 exec.h
--- target-i386/exec.h	26 Mar 2004 22:26:53 -0000	1.10
+++ target-i386/exec.h	19 Apr 2004 13:04:29 -0000
@@ -19,52 +19,60 @@
  */
 #include "dyngen-exec.h"
 
+#ifdef __x86_64__
+#define REGISTER
+#define AREGASM(x)
+#else
+#define REGISTER register
+#define AREGASM(x) asm(x)
+#endif
+
 /* at least 4 register variables are defines */
-register struct CPUX86State *env asm(AREG0);
-register uint32_t T0 asm(AREG1);
-register uint32_t T1 asm(AREG2);
-register uint32_t T2 asm(AREG3);
+REGISTER struct CPUX86State *env;
+REGISTER uint32_t T0 AREGASM(AREG1);
+REGISTER uint32_t T1 AREGASM(AREG2);
+REGISTER uint32_t T2 AREGASM(AREG3);
 
 #define A0 T2
 
 /* if more registers are available, we define some registers too */
 #ifdef AREG4
-register uint32_t EAX asm(AREG4);
+REGISTER uint32_t EAX AREGASM(AREG4);
 #define reg_EAX
 #endif
 
 #ifdef AREG5
-register uint32_t ESP asm(AREG5);
+REGISTER uint32_t ESP AREGASM(AREG5);
 #define reg_ESP
 #endif
 
 #ifdef AREG6
-register uint32_t EBP asm(AREG6);
+REGISTER uint32_t EBP AREGASM(AREG6);
 #define reg_EBP
 #endif
 
 #ifdef AREG7
-register uint32_t ECX asm(AREG7);
+REGISTER uint32_t ECX AREGASM(AREG7);
 #define reg_ECX
 #endif
 
 #ifdef AREG8
-register uint32_t EDX asm(AREG8);
+REGISTER uint32_t EDX AREGASM(AREG8);
 #define reg_EDX
 #endif
 
 #ifdef AREG9
-register uint32_t EBX asm(AREG9);
+REGISTER uint32_t EBX AREGASM(AREG9);
 #define reg_EBX
 #endif
 
 #ifdef AREG10
-register uint32_t ESI asm(AREG10);
+REGISTER uint32_t ESI AREGASM(AREG10);
 #define reg_ESI
 #endif
 
 #ifdef AREG11
-register uint32_t EDI asm(AREG11);
+REGISTER uint32_t EDI AREGASM(AREG11);
 #define reg_EDI
 #endif