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From: Paul Brook <paul@codesourcery.com>
Subject: Re: [Qemu-devel] x86_64 target
Date: Tue, 4 Jan 2005 14:29:50 +0000
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To: qemu-devel@nongnu.org, Karl Magdsick <kmagnum@gmail.com>

On Tuesday 04 January 2005 02:15, Karl Magdsick wrote:
> The EMT Xeons implement all of the amd64 instructions that were in an
> early release of the instruction set reference, so I think a single
> 64-bit Linux kernel can boot and run on both amd64 and EMT Xeon chips.
>  The EMT Xeons may implement all of the instructions announced before
> the name switch to amd64, but I'm not sure exactly when the name
> change occured and when the newer instructions were announced.

The Intel chips actually implement all the instructions except 3DNOW and add 
SSE3, same as p4 vs. AthlonXP. These are the only instruction set 
differences, and the only differences that are visible from userspace.

The other differences in the implementations are that the current generation 
of Intel chips don't implement the NX bit, or have an IOMMU. I think there 
are also differences in how pagetables are setup/managed though I'm not sure 
about the details.

Paul