From: Paul Brook <paul@codesourcery.com>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] Armv5 target
Date: Mon, 31 Jan 2005 23:13:37 +0000 [thread overview]
Message-ID: <200501312313.38869.paul@codesourcery.com> (raw)
In-Reply-To: <20050131224414.GA28203@xi.wantstofly.org>
On Monday 31 January 2005 22:44, Lennert Buytenhek wrote:
> Hi,
>
> On Mon, Jan 31, 2005 at 08:19:44PM +0000, Paul Brook wrote:
> > The attached patch implements the full armv5te user mode instruction set.
>
> Thanks for persisting on this!
>
> You posted this patch on 20040802 -- is it still needed?
>
> Index: cpu-exec.c
> ===================================================================
> RCS file: /cvsroot/qemu/qemu/cpu-exec.c,v
> retrieving revision 1.38
> diff -u -p -r1.38 cpu-exec.c
> --- cpu-exec.c 14 Jul 2004 17:20:55 -0000 1.38
> +++ cpu-exec.c 2 Aug 2004 00:24:46 -0000
> @@ -718,6 +719,10 @@ static inline int handle_cpu_signal(unsi
> int is_write, sigset_t *old_set,
> void *puc)
> {
> + /* XXX: locking issue */
> + if (is_write && page_unprotect(address, pc, puc)) {
> + return 1;
> + }
> /* XXX: do more */
> return 0;
> }
Sort of. Self-modifying code (e.g. stack trampolines) are still broken, and
the patch above should work.
However I just tested it and it doesn't seem to work any more. It seems that
the SEGV handler is being passed an address of 0, rather than the actual
faulting location.
This may be a host kernel/libc bug.
Paul
next prev parent reply other threads:[~2005-01-31 23:32 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-01-31 20:19 [Qemu-devel] Armv5 target Paul Brook
2005-01-31 22:44 ` Lennert Buytenhek
2005-01-31 23:13 ` Paul Brook [this message]
2005-02-02 1:26 ` Paul Brook
2005-02-02 12:01 ` Lennert Buytenhek
2005-02-02 15:47 ` Paul Brook
2005-02-02 18:18 ` Ulrich Hecht
2005-02-02 19:17 ` Paul Brook
2005-02-03 14:08 ` Ulrich Hecht
2005-02-03 15:43 ` Paul Brook
2005-02-03 9:59 ` Sylvain Petreolle
2005-02-03 11:25 ` Ulrich Hecht
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