From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Cx2y0-0004Ve-Fi for qemu-devel@nongnu.org; Fri, 04 Feb 2005 07:53:44 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Cx2xl-0004P5-EN for qemu-devel@nongnu.org; Fri, 04 Feb 2005 07:53:29 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Cx2xj-0004JW-Hg for qemu-devel@nongnu.org; Fri, 04 Feb 2005 07:53:27 -0500 Received: from [195.135.220.2] (helo=Cantor.suse.de) by monty-python.gnu.org with esmtp (TLSv1:DES-CBC3-SHA:168) (Exim 4.34) id 1Cx2bq-0008HF-JB for qemu-devel@nongnu.org; Fri, 04 Feb 2005 07:30:50 -0500 Received: from hermes.suse.de (hermes-ext.suse.de [195.135.221.8]) (using TLSv1 with cipher EDH-RSA-DES-CBC3-SHA (168/168 bits)) (No client certificate requested) by Cantor.suse.de (Postfix) with ESMTP id AD808140718F for ; Fri, 4 Feb 2005 13:30:48 +0100 (CET) From: Ulrich Hecht Subject: Re: [Qemu-devel] Qemu arm emulation Date: Fri, 4 Feb 2005 13:30:47 +0100 References: <20041203210758.GD21652@cray.fish.zetnet.co.uk> In-Reply-To: <20041203210758.GD21652@cray.fish.zetnet.co.uk> MIME-Version: 1.0 Content-Type: Multipart/Mixed; boundary="Boundary-00=_3r2ACPGH8bsCb5/" Message-Id: <200502041330.47927.uli@suse.de> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org --Boundary-00=_3r2ACPGH8bsCb5/ Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Content-Disposition: inline Hi! On Friday 03 December 2004 22:07, Charlie Baylis wrote: > 2. Shifter carry out for immediates > When an immediate value is generated the shifter carry out is set to > bit31 of the resulting immediate if the shift value is non zero. If > the shift value is zero, then the shifter carry out has the value of > the C flag. > > Therefore, the following instructions should alter the carry flag when > used with an immediate which has a non-zero shift. > ANDS BICS EORS MOVS MVNS ORRS TEQS and TSTS > (The remaining data processing instructions generate the C flag from > the calculation performed by the instruction) Here's a patch that fixes the testcase. I made it for 0.6.1, but it still applies and works for CVS. CU Uli --Boundary-00=_3r2ACPGH8bsCb5/ Content-Type: text/x-diff; charset="utf-8"; name="qemu-0.6.1-shifter_carry.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="qemu-0.6.1-shifter_carry.patch" --- target-arm/op.c +++ target-arm/op.c @@ -98,6 +98,12 @@ T1 = PARAM1; } +void OPPROTO op_movl_T1_im_cc(void) +{ + T1 = PARAM1; + env->CF = PARAM1 >> 31; +} + void OPPROTO op_movl_T2_im(void) { T2 = PARAM1; --- target-arm/translate.c +++ target-arm/translate.c @@ -350,7 +350,11 @@ shift = ((insn >> 8) & 0xf) * 2; if (shift) val = (val >> shift) | (val << (32 - shift)); - gen_op_movl_T1_im(val); + if (logic_cc && shift) + gen_op_movl_T1_im_cc(val); + else + gen_op_movl_T1_im(val); + /* XXX: is CF modified ? */ } else { /* register */ --Boundary-00=_3r2ACPGH8bsCb5/--