From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1DFIlS-0005NT-SS for qemu-devel@nongnu.org; Sat, 26 Mar 2005 16:24:15 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1DFIlN-0005Jg-UN for qemu-devel@nongnu.org; Sat, 26 Mar 2005 16:24:10 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1DFIlH-0005FC-Vr for qemu-devel@nongnu.org; Sat, 26 Mar 2005 16:24:04 -0500 Received: from [65.74.133.9] (helo=mail.codesourcery.com) by monty-python.gnu.org with esmtp (TLSv1:DES-CBC3-SHA:168) (Exim 4.34) id 1DFIHn-0007Ch-Mo for qemu-devel@nongnu.org; Sat, 26 Mar 2005 15:53:35 -0500 From: Paul Brook Date: Sat, 26 Mar 2005 20:53:32 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200503262053.32734.paul@codesourcery.com> Subject: [Qemu-devel] [patch] CPU_DoubleU and soft-float Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org The definition of CPU_DoubleU is incorrect on arm hosts when using soft-float. In this case "float64" will have host integer word ordering, not host hardware float ordering. Paul Index: cpu-all.h =================================================================== RCS file: /cvsroot/qemu/qemu/cpu-all.h,v retrieving revision 1.42 diff -u -p -r1.42 cpu-all.h --- cpu-all.h 13 Mar 2005 18:50:23 -0000 1.42 +++ cpu-all.h 26 Mar 2005 20:48:25 -0000 @@ -120,7 +120,8 @@ static inline void tswap64s(uint64_t *s) endian ! */ typedef union { float64 d; -#if defined(WORDS_BIGENDIAN) || (defined(__arm__) && !defined(__VFP_FP__)) +#if defined(WORDS_BIGENDIAN) \ + || (defined(__arm__) && !defined(__VFP_FP__) && !defined(CONFIG_SOFTFLOAT)) struct { uint32_t upper; uint32_t lower;