[Qemu-devel] mini documentation of "info registers" output

[Qemu-devel] mini documentation of "info registers" output

[Mulyadi Santosa]

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Dear list

Here is a little cheat sheet for you to better understand what "info 
registers" shows on qemu's monitor. This infomations are strictly for 
x86

Feel free to correct or send feedbacks about this document

PS: Hetz, please "copy" this document toward Qemu forums.... Thank you 
in advance...

regards

Mulyadi

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Re: [Qemu-devel] mini documentation of "info registers" output

[Paul Brook]

On Friday 01 July 2005 05:33, Mulyadi Santosa wrote:
> Dear list
>
> Here is a little cheat sheet for you to better understand what "info
> registers" shows on qemu's monitor. This infomations are strictly for
> x86

> CCS : Compiled Code Source (?)

Condition Code Source.

> CCD : Compiled Code Destination (?)

Condition Code Source.

> CCO : (?) instruction name

Condition Code Operation

These 3 are used to implement lazy flag evaluation. Most x86 instructions set 
the condition code flags, but only a relatively small subset of instructions 
actually use these flags.

Calculating the flags at every operation would be very slow. Instead qemu just 
remembers the destination, one source operand and the instruction class of a 
flag setting operation, then lazily evaluates the flags as needed.

Paul

Re: Re: [Qemu-devel] mini documentation of "info registers" output

[Mulyadi Santosa]

Hello Paul...

> > CCD : Compiled Code Destination (?)
>
> Condition Code Source.

Or Condition Code Destination?

> These 3 are used to implement lazy flag evaluation. Most x86
> instructions set the condition code flags, but only a relatively
> small subset of instructions actually use these flags.

hm, i see....BTW, these two lazy flags, CCS and CCD, they are the 
representation of EFLAGS? CMIIW. If yes, can I assume that they have 
same format as EFLAGS?

anyway, it is safe to frequently ignore flags? For example, if MUL 
generate overflow and set Zero Flag, Qemu must be aware of it, right? 
Or we can still safely ignore it?

regards

Mulyadi

Re: [Qemu-devel] mini documentation of "info registers" output

[Gwenole Beauchesne]

Le samedi, 2 jul 2005, à 06:12 Europe/Paris, Mulyadi Santosa a écrit :

> hm, i see....BTW, these two lazy flags, CCS and CCD, they are the
> representation of EFLAGS?

CCS/CCD = Condition Codes Source/Destination values. Those represent 
part of the state (input and/or result + operation type) used to 
evaluate the EFLAGS, when necessary. Hence the term lazy evaluation of 
condition codes and they aren't in the EFLAGS format.

> anyway, it is safe to frequently ignore flags? For example, if MUL
> generate overflow and set Zero Flag, Qemu must be aware of it, right?
> Or we can still safely ignore it?

Liveness analysis of the EFLAGS bits is performed to determine where 
computation of EFLAGS is really needed.

Bye,
Gwenolé.

Re: [Qemu-devel] mini documentation of "info registers" output

[Paul Brook]

On Saturday 02 July 2005 05:12, Mulyadi Santosa wrote:
> Hello Paul...
>
> > > CCD : Compiled Code Destination (?)
> >
> > Condition Code Source.
>
> Or Condition Code Destination?

Yes.

> > These 3 are used to implement lazy flag evaluation. Most x86
> > instructions set the condition code flags, but only a relatively
> > small subset of instructions actually use these flags.
>
> hm, i see....BTW, these two lazy flags, CCS and CCD, they are the
> representation of EFLAGS? CMIIW. If yes, can I assume that they have
> same format as EFLAGS?

CC_SRC and CC_DST are the output and one of the inputs to the flag setting 
instruction. CC_OP tells qemu how to calculate the flags from these. In some 
cases these will be the actual eflags value, and CC_OP will be set to 
CC_OP_EFLAGS.

Note that qemu updates the eflags when it exits the cpu execution loop. This 
means the values seen in info registers will be correct.

> anyway, it is safe to frequently ignore flags? For example, if MUL
> generate overflow and set Zero Flag, Qemu must be aware of it, right?

Qemu knows which instructions read/set which flag bits. Qemu does two 
flags-based optimizations:
- Converts flag-setting operations onto non-flag setting operations when the 
flags are ignored.
- Partial evaluation of condition codes when only a subset of flags are used.

Paul