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From: Paul Brook <paul@codesourcery.com>
Subject: Re: [Qemu-devel] mini documentation of "info registers" output
Date: Sat, 2 Jul 2005 16:08:02 +0100
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To: a_mulyadi@softhome.net
Cc: qemu-devel@nongnu.org

On Saturday 02 July 2005 05:12, Mulyadi Santosa wrote:
> Hello Paul...
>
> > > CCD : Compiled Code Destination (?)
> >
> > Condition Code Source.
>
> Or Condition Code Destination?

Yes.

> > These 3 are used to implement lazy flag evaluation. Most x86
> > instructions set the condition code flags, but only a relatively
> > small subset of instructions actually use these flags.
>
> hm, i see....BTW, these two lazy flags, CCS and CCD, they are the
> representation of EFLAGS? CMIIW. If yes, can I assume that they have
> same format as EFLAGS?

CC_SRC and CC_DST are the output and one of the inputs to the flag setting 
instruction. CC_OP tells qemu how to calculate the flags from these. In some 
cases these will be the actual eflags value, and CC_OP will be set to 
CC_OP_EFLAGS.

Note that qemu updates the eflags when it exits the cpu execution loop. This 
means the values seen in info registers will be correct.

> anyway, it is safe to frequently ignore flags? For example, if MUL
> generate overflow and set Zero Flag, Qemu must be aware of it, right?

Qemu knows which instructions read/set which flag bits. Qemu does two 
flags-based optimizations:
- Converts flag-setting operations onto non-flag setting operations when the 
flags are ignored.
- Partial evaluation of condition codes when only a subset of flags are used.

Paul