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From: "Jim C. Brown" <jma5@umd.edu>
To: bolle@geodb.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] Writing to ROM-Range 0xC800-EFFF
Date: Mon, 25 Jul 2005 11:39:25 -0400	[thread overview]
Message-ID: <20050725153925.GA24463@jbrown.mylinuxbox.org> (raw)
In-Reply-To: <001201c58c8b$bb0c85b0$6401a8c0@geodb.org>

On Tue, Jul 19, 2005 at 08:00:21PM +0200, Andreas Bollhalder wrote:
> Hello
> 
> What does I need to change in the source code of QEMU that it would be
> possible to enable write access to the ROM adresses from 0xC800 up to
> 0xEFFF ? For instance, "UMBPCI.SYS"
> (http://www.uwe-sieber.de/umbpci_e.html) can made this range
> accessible for direct access if no BIOS-ROM is using it. The original
> chipset which QEMU emulate (Intel 440FX) does allow this, but in QEMU,
> it won't work.
> 
> Any ideas ?
> 
> Andreas
> 

I'd recommend looking at i440fx_init() in hw/pci.c as a starting point.

Also see if you can modify the constant IO_MEM_ROM.

-- 
Infinite complexity begets infinite beauty.
Infinite precision begets infinite perfection.

  reply	other threads:[~2005-07-25 15:49 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-06-05 17:11 [Qemu-devel] qemu/slirp bootp.c bootp.h ip_icmp.h libslirp.h Fabrice Bellard
2005-06-05 18:00 ` Andreas Bollhalder
2005-06-06  1:02   ` [Qemu-devel] " Ronald
2005-06-07 16:48     ` Andreas Bollhalder
2005-07-19 18:00     ` [Qemu-devel] Writing to ROM-Range 0xC800-EFFF Andreas Bollhalder
2005-07-25 15:39       ` Jim C. Brown [this message]
2005-07-26 14:41         ` Andreas Bollhalder
2006-02-08 19:33           ` [Qemu-devel] QEMU freeze with "Servicing hardware INT=0x08" Andreas Bollhalder

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