From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Dx5Ca-00037C-4f for qemu-devel@nongnu.org; Mon, 25 Jul 2005 11:49:12 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Dx5CT-00032n-C6 for qemu-devel@nongnu.org; Mon, 25 Jul 2005 11:49:06 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Dx5CQ-0002wa-Ai for qemu-devel@nongnu.org; Mon, 25 Jul 2005 11:49:02 -0400 Received: from [128.8.10.162] (helo=po0.wam.umd.edu) by monty-python.gnu.org with esmtp (Exim 4.34) id 1Dx5Ds-0003py-Ss for qemu-devel@nongnu.org; Mon, 25 Jul 2005 11:50:33 -0400 Date: Mon, 25 Jul 2005 11:39:25 -0400 From: "Jim C. Brown" Subject: Re: [Qemu-devel] Writing to ROM-Range 0xC800-EFFF Message-ID: <20050725153925.GA24463@jbrown.mylinuxbox.org> References: <001201c58c8b$bb0c85b0$6401a8c0@geodb.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <001201c58c8b$bb0c85b0$6401a8c0@geodb.org> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: bolle@geodb.org, qemu-devel@nongnu.org On Tue, Jul 19, 2005 at 08:00:21PM +0200, Andreas Bollhalder wrote: > Hello > > What does I need to change in the source code of QEMU that it would be > possible to enable write access to the ROM adresses from 0xC800 up to > 0xEFFF ? For instance, "UMBPCI.SYS" > (http://www.uwe-sieber.de/umbpci_e.html) can made this range > accessible for direct access if no BIOS-ROM is using it. The original > chipset which QEMU emulate (Intel 440FX) does allow this, but in QEMU, > it won't work. > > Any ideas ? > > Andreas > I'd recommend looking at i440fx_init() in hw/pci.c as a starting point. Also see if you can modify the constant IO_MEM_ROM. -- Infinite complexity begets infinite beauty. Infinite precision begets infinite perfection.