From: Ralf Baechle <ralf@linux-mips.org>
To: Fabrice Bellard <fabrice@bellard.org>, qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 3/3] Fix interrupt masking
Date: Mon, 15 Aug 2005 09:58:42 +0100 [thread overview]
Message-ID: <20050815085842.GA7650@linux-mips.org> (raw)
Only take interrupts that are actually enabled in the CPU's interrupt mask
in c0_status.
cpu-exec.c | 2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: qemu-mips/cpu-exec.c
===================================================================
--- qemu-mips.orig/cpu-exec.c
+++ qemu-mips/cpu-exec.c
@@ -307,7 +307,7 @@ int cpu_exec(CPUState *env1)
#elif defined(TARGET_MIPS)
if ((interrupt_request & CPU_INTERRUPT_HARD) &&
(env->CP0_Status & (1 << CP0St_IE)) &&
- (env->CP0_Cause & 0x0000FF00) &&
+ (env->CP0_Status & env->CP0_Cause & 0x0000FF00) &&
!(env->hflags & MIPS_HFLAG_EXL) &&
!(env->hflags & MIPS_HFLAG_ERL) &&
!(env->hflags & MIPS_HFLAG_DM)) {
reply other threads:[~2005-08-15 9:02 UTC|newest]
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