From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1ELJiO-0001N8-Bt for qemu-devel@nongnu.org; Fri, 30 Sep 2005 08:10:14 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1ELJiG-0001LW-Qi for qemu-devel@nongnu.org; Fri, 30 Sep 2005 08:10:06 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1ELJiG-0001FJ-AB for qemu-devel@nongnu.org; Fri, 30 Sep 2005 08:10:04 -0400 Received: from [192.76.135.70] (helo=kurt.tools.de) by monty-python.gnu.org with esmtp (TLS-1.0:DHE_RSA_3DES_EDE_CBC_SHA:24) (Exim 4.34) id 1ELJdB-0004Vl-9B for qemu-devel@nongnu.org; Fri, 30 Sep 2005 08:04:49 -0400 Received: from imap3.tools.intra (imap3.tools.intra [172.20.0.8]) by kurt.tools.de (8.13.3/8.13.3) with ESMTP id j8UC4jpL011077 for ; Fri, 30 Sep 2005 14:04:45 +0200 (MEST) Received: from tiger2.tools.intra (tiger2.tools.intra [172.20.0.11]) by imap3.tools.intra (8.13.1+Sun/8.13.1) with SMTP id j8UC4jK0026786 for ; Fri, 30 Sep 2005 14:04:45 +0200 (MEST) Message-Id: <200509301204.j8UC4jK0026786@imap3.tools.intra> Date: Fri, 30 Sep 2005 14:04:45 +0200 (CEST) From: Juergen Keil Subject: Re: [Qemu-devel] IDE busmaster DMA support MIME-Version: 1.0 Content-Type: TEXT/plain; charset=us-ascii Content-MD5: MgPl/241SXuqswnXVmT4nQ== Reply-To: Juergen Keil , qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org > I'm trying to write an IDE driver with busmaster DMA support. > My problem is that I can't get the right controller registers addresses. > > In the IDE BusMaster DMA specification : > > "The control registers for the controller are allocated via the > devices Base Address register at offset 0x20 in PCI configuration > space." > > If I read the word at offset 0x20 in the PCI configuration space, I get > 0xc001. But if I boot qemu with a linux live-cd, it tells me that BM-DMA > is at 0xc000 > > Do I have to init the PCI IDE controller or something ? Bit 0 encodes if the registers are in IO (1) or in memory (0) space. You get the IO base address by using a 0xfffffffe mask. For memory space the mask is 0xfffffff0, the low four bits encode a few memory properties (prefetch, 32-bit vs. 64-bit memory addresses). See the PCI spec for more details. Or for example the PCI_BASE_* defines here: http://cvs.opensolaris.org/source/xref/usr/src/uts/common/sys/pci.h#519