From: Paul Brook <paul@codesourcery.com>
To: Mark Williamson <mark.williamson@cl.cam.ac.uk>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] PCI access virtualization
Date: Fri, 6 Jan 2006 13:27:47 +0000 [thread overview]
Message-ID: <200601061327.48828.paul@codesourcery.com> (raw)
In-Reply-To: <200601060154.45653.mark.williamson@cl.cam.ac.uk>
> > IIUC PCI cards don't really have "DMA engines" as such. The PCI bridge
> > just maps PCI address space onto physical memory. A Busmaster PCI device
> > can then make arbitrary acceses whenever it wants. I expect the default
> > mapping is a 1:1 mapping of the first 4G of physical ram.
>
> I was under the impression that the on-card bus-mastering engines were
> often one of a few standard designs - this was suggested to me by someone
> more knowledgeable than myself but must admit I don't have any hard
> evidence that it's the case ;-)
What about 64-bit systems that use an IOMMU? Don't they already have a 64-bit
physical -> 32-bit IO address space mapping? I don't know if this mapping is
per-bus or system global.
Paul
next prev parent reply other threads:[~2006-01-06 13:29 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-01-05 10:14 [Qemu-devel] PCI access virtualization Michael Renzmann
2006-01-05 14:25 ` Paul Brook
2006-01-05 17:40 ` Mark Williamson
2006-01-05 18:10 ` Paul Brook
2006-01-05 21:13 ` Jim C. Brown
2006-01-06 1:54 ` Mark Williamson
2006-01-06 13:27 ` Paul Brook [this message]
2006-01-06 14:23 ` Mark Williamson
2006-01-05 16:25 ` Mark Williamson
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