From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1F53PJ-0001aO-7g for qemu-devel@nongnu.org; Fri, 03 Feb 2006 11:03:33 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1F53KN-0000gN-2k for qemu-devel@nongnu.org; Fri, 03 Feb 2006 10:58:29 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1F52gq-0000u9-MM for qemu-devel@nongnu.org; Fri, 03 Feb 2006 10:17:37 -0500 Received: from [65.74.133.4] (helo=mail.codesourcery.com) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA:32) (Exim 4.52) id 1F52fs-0000Nl-12 for qemu-devel@nongnu.org; Fri, 03 Feb 2006 10:16:36 -0500 From: Paul Brook Date: Fri, 3 Feb 2006 15:14:13 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200602031514.14309.paul@codesourcery.com> Subject: [Qemu-devel] [patch] Arm/Thumb entry points Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org The patch fixes a bug in the arm usermode emulation. The CPU wasn't being correctly initialized when the entry point is a Thumb function. Paul === linux-user/elfload.c ================================================================== --- linux-user/elfload.c (revision 1831) +++ linux-user/elfload.c (local) @@ -100,7 +100,9 @@ target_long *stack = (void *)infop->start_stack; memset(regs, 0, sizeof(*regs)); regs->ARM_cpsr = 0x10; - regs->ARM_pc = infop->entry; + if (infop->entry & 1) + regs->ARM_cpsr |= CPSR_T; + regs->ARM_pc = infop->entry & 0xfffffffe; regs->ARM_sp = infop->start_stack; regs->ARM_r2 = tswapl(stack[2]); /* envp */ regs->ARM_r1 = tswapl(stack[1]); /* argv */