From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1FhAoE-0005yY-B0 for qemu-devel@nongnu.org; Fri, 19 May 2006 15:38:50 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1FhAoA-0005va-IY for qemu-devel@nongnu.org; Fri, 19 May 2006 15:38:49 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1FhAoA-0005vQ-A4 for qemu-devel@nongnu.org; Fri, 19 May 2006 15:38:46 -0400 Received: from [212.8.0.13] (helo=rosi.naasa.net) by monty-python.gnu.org with esmtp (Exim 4.52) id 1FhArY-0007GC-0a for qemu-devel@nongnu.org; Fri, 19 May 2006 15:42:16 -0400 From: Joerg Platte Subject: Re: [Qemu-devel] fpu problems with qemu-system-sparc Date: Fri, 19 May 2006 21:38:29 +0200 References: In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-15" Content-Disposition: inline Message-Id: <200605192138.32748.lists@naasa.net> Content-Transfer-Encoding: quoted-printable Reply-To: jplatte@naasa.net, qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Blue Swirl Cc: qemu-devel@nongnu.org Am Freitag, 19. Mai 2006 21:14 schrieb Blue Swirl: Hi! > I'd still check the ld/stfsr implementation. The V8 spec says that stfs= r > _may_ zero the ftt field in fsr and what you describe sounds like the > trapping happens too often. Just add env->fsr &=3D ~FSR_FTT_MASK into > op_stfsr. I already log each fsr access. All bits, except the fcc bits, are always = zero=20 when linux or the program try to access the fsr. > The timer frequency can be changed by modifying CNT_FREQ in slavio_time= r.c > if you want to try that. Thanks, I'll try that later. regards, J=F6rg