From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1G32ke-0004SL-Om for qemu-devel@nongnu.org; Tue, 18 Jul 2006 23:29:32 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1G32kc-0004Rr-Uf for qemu-devel@nongnu.org; Tue, 18 Jul 2006 23:29:31 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1G32kc-0004Rm-Os for qemu-devel@nongnu.org; Tue, 18 Jul 2006 23:29:30 -0400 Received: from [65.74.133.4] (helo=mail.codesourcery.com) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA:32) (Exim 4.52) id 1G32ne-0007zy-Bj for qemu-devel@nongnu.org; Tue, 18 Jul 2006 23:32:38 -0400 From: Paul Brook Subject: Re: [Qemu-devel] smc91x irq patch Date: Wed, 19 Jul 2006 04:29:22 +0100 References: <44BCD9E8.6060108@nomovok.com> <44BD1450.6040002@gmx.net> In-Reply-To: <44BD1450.6040002@gmx.net> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200607190429.22717.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Tuesday 18 July 2006 18:03, Thorsten Zitterell wrote: > I am working on a Gumstix system [1] emulation for QEMU which is based > on a Intel XScale processor. The board has an expansion card for network > support which is a smc91x compatible NIC. However, the irq line is not > directly connected to the processor's interrupt controller but to an > GPIO which triggers an irq when a level edge is detected. As discussed on IRC this is the wrong way to do this. Instead use the mechanisms in arm_pic.[ch] and make you GPIO emulation look like an interrupt controller. There's no point passing round both a pic callback and an object when we can embed the callback in the object. Paul