From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1G65B8-0002ts-F3 for qemu-devel@nongnu.org; Thu, 27 Jul 2006 08:41:26 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1G65B7-0002tS-MN for qemu-devel@nongnu.org; Thu, 27 Jul 2006 08:41:26 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1G65B7-0002tO-IK for qemu-devel@nongnu.org; Thu, 27 Jul 2006 08:41:25 -0400 Received: from [65.74.133.4] (helo=mail.codesourcery.com) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA:32) (Exim 4.52) id 1G65Cs-0001t3-F8 for qemu-devel@nongnu.org; Thu, 27 Jul 2006 08:43:14 -0400 From: Paul Brook Subject: Re: [Qemu-devel] Adding a device into Qemu ARM Date: Thu, 27 Jul 2006 13:41:06 +0100 References: <20060727094741.18440.qmail@web38106.mail.mud.yahoo.com> In-Reply-To: <20060727094741.18440.qmail@web38106.mail.mud.yahoo.com> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200607271341.07232.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org > Furthermore, I have some questions on the steps above: > + step 2: which interrupt I can register with the PIC? Or in my case, it > must not? > + step 2: which value of MEMORY SPACE I can register for this > LED? Anything that's not already being used. Same way you would if you were designing real hardware. Paul