From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1GMStv-0004Ft-Ok for qemu-devel@nongnu.org; Sun, 10 Sep 2006 13:15:23 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1GMStu-0004Fd-7x for qemu-devel@nongnu.org; Sun, 10 Sep 2006 13:15:23 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1GMStu-0004Fa-5S for qemu-devel@nongnu.org; Sun, 10 Sep 2006 13:15:22 -0400 Received: from [65.74.133.4] (helo=mail.codesourcery.com) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA:32) (Exim 4.52) id 1GMSuz-0006ZH-E3 for qemu-devel@nongnu.org; Sun, 10 Sep 2006 13:16:29 -0400 From: Paul Brook Subject: Re: [Qemu-devel] ARM load/store multiple bug Date: Sun, 10 Sep 2006 18:15:17 +0100 References: <4504415D.50905@bellard.org> In-Reply-To: <4504415D.50905@bellard.org> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200609101815.18021.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Sunday 10 September 2006 17:46, Fabrice Bellard wrote: > Note that QEMU supports specific unaligned access handling when using > the softmmu code. It is possible to implement the ARM specific unaligned > accesses without slowing down the aligned case. See the mips case with > do_unaligned_access(). I think additional bits will be required. The behavior of unaligned accesses depends on the instruction performing the access. Paul