From: Paul Brook <paul@codesourcery.com>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] ARM CPU Speed simulated by Qemu?
Date: Tue, 12 Sep 2006 15:34:27 +0100 [thread overview]
Message-ID: <200609121534.29506.paul@codesourcery.com> (raw)
In-Reply-To: <4506C261.5070309@bluegap.ch>
> How much do misses on the branch prediction level cost? How much
> pipeline interlocks? I don't think those would be _that_ dramatic. Since
> today's compilers are said to be optimizing quite well...
It all depends on the code you're running. Certainly branch prediction can
have a major effect if the hardware consistently gets it wrong. Even arm
hardware has 5/7 stage pipelines that need flushing on a mispredict.
Pipeline interlocks are likely to be relatively small, for most Arm hardware
at least (ia64 is a completely different story :-). As a compiler author I'd
generally expect a few % performance improvement from a good scheduling
model.
I wouldn't assuming the compiler gets everything right, as it's quite common
for systems to be built for the lowest common denominator target.
Paul
next prev parent reply other threads:[~2006-09-12 14:34 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-09-08 19:26 [Qemu-devel] Re: qemu-system-sparc video problem on 16 bitdisplays Blue Swirl
2006-09-12 0:17 ` Stuart Brady
2006-09-12 7:20 ` [Qemu-devel] ARM CPU Speed simulated by Qemu? Tieu Ma Dau
2006-09-12 11:03 ` nyos
2006-09-12 12:43 ` Paul Brook
2006-09-12 13:19 ` Markus Schiltknecht
2006-09-12 13:39 ` Paul Brook
2006-09-12 14:21 ` Markus Schiltknecht
2006-09-12 14:34 ` Paul Brook [this message]
-- strict thread matches above, loose matches on Subject: below --
2006-09-12 14:44 Laurent DESNOGUES
2006-09-12 14:58 ` Markus Schiltknecht
2006-09-12 17:42 ` K. Richard Pixley
2006-09-12 15:08 Laurent DESNOGUES
2006-09-12 15:19 ` Markus Schiltknecht
2006-09-12 15:26 Laurent DESNOGUES
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