From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1GjG70-00043x-G5 for qemu-devel@nongnu.org; Sun, 12 Nov 2006 09:15:06 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1GjG6v-00040n-Rr for qemu-devel@nongnu.org; Sun, 12 Nov 2006 09:15:06 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1GjG6v-00040c-DO for qemu-devel@nongnu.org; Sun, 12 Nov 2006 09:15:01 -0500 Received: from [65.74.133.4] (helo=mail.codesourcery.com) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA:32) (Exim 4.52) id 1GjG6v-0000K9-1F for qemu-devel@nongnu.org; Sun, 12 Nov 2006 09:15:01 -0500 From: Paul Brook Subject: Re: [Qemu-devel] [PATCH] Huge TLB performance improvement Date: Sun, 12 Nov 2006 14:08:08 +0000 References: <20060306145929.GD27785@networkno.de> <20061112011035.GB21771@nevyn.them.org> <45570A32.3030608@wanadoo.fr> In-Reply-To: <45570A32.3030608@wanadoo.fr> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Message-Id: <200611121408.09895.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Sunday 12 November 2006 11:49, Laurent Desnogues wrote: > Daniel Jacobowitz a =E9crit : > > Straight qemu with my previously posted MIPS patches takes 6:13 to > > start and reboot a MIPS userspace (through init, so lots of fork/exec). > > > > Thiemo's patch, which flushes the whole jump buffer, cuts it to 1:40. > > > > A patch which finds the entries which need to be flushed more > > efficiently cuts it to 1:21. > > > > A patch which flushes up to 1/32nd of the jump buffer indiscriminately > > cuts it to 1:11-1:13. > > Warning: I don't know anything about the Qemu MMU implementation > so this question is perhaps stupid :) > > Did you try to benchmark some user space applications with the > various implementations you propose? The boot of a Linux kernel > is quite heavy on various kinds of flushes and so is very > different from "standard" applications. MIPS is different because it has a relatively small software managed TLB.=20 Other targets have a hardware managed TLB. On a hardware managed TLB the OS= =20 treats it as if it were infinite size, and invalidation only occurs when a = OS=20 changes the mappings. On a software managed TLB "flushes" are more likely t= o=20 occur during normal operation as TLB slots are reused. Paul