From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Gk8cN-0004Ro-SR for qemu-devel@nongnu.org; Tue, 14 Nov 2006 19:27:07 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Gk8cL-0004RH-KH for qemu-devel@nongnu.org; Tue, 14 Nov 2006 19:27:07 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Gk8cL-0004RA-He for qemu-devel@nongnu.org; Tue, 14 Nov 2006 19:27:05 -0500 Received: from [82.232.2.251] (helo=farad.aurel32.net) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA:32) (Exim 4.52) id 1Gk8cL-0000Hl-Q0 for qemu-devel@nongnu.org; Tue, 14 Nov 2006 19:27:06 -0500 Received: from bode.aurel32.net ([2001:618:400:fc13:211:9ff:feed:c498]) by farad.aurel32.net with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA:32) (Exim 4.50) id 1Gk8cG-0007Va-Ay for qemu-devel@nongnu.org; Wed, 15 Nov 2006 01:27:00 +0100 Received: from aurel32 by bode.aurel32.net with local (Exim 4.63) (envelope-from ) id 1Gk8cF-0005TX-1P for qemu-devel@nongnu.org; Wed, 15 Nov 2006 01:26:59 +0100 Date: Wed, 15 Nov 2006 01:26:59 +0100 From: Aurelien Jarno Message-ID: <20061115002658.GA20979@bode.aurel32.net> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline Subject: [Qemu-devel] ARM Versatile/Realview reset Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org The ARM Versatile and Realview platforms support reset (but not halt), howvever it is not implemented in QEMU. The patch below adds this support. It is very similar to the patch from Daniel Jacobowitz concerning the MIPS platform. Note that you need a kernel >= 2.6.19-rc1 (or a patched kernel) to get the SCSI controller correctly detected on reboot on the Versatile platform. -- .''`. Aurelien Jarno | GPG: 1024D/F1BCDB73 : :' : Debian developer | Electrical Engineer `. `' aurel32@debian.org | aurelien@aurel32.net `- people.debian.org/~aurel32 | www.aurel32.net Index: hw/arm_sysctl.c =================================================================== RCS file: /sources/qemu/qemu/hw/arm_sysctl.c,v retrieving revision 1.1 diff -u -d -p -r1.1 arm_sysctl.c --- hw/arm_sysctl.c 23 Sep 2006 17:40:58 -0000 1.1 +++ hw/arm_sysctl.c 15 Nov 2006 00:02:37 -0000 @@ -149,7 +149,7 @@ static void arm_sysctl_write(void *opaqu if (s->lockval == LOCK_VALUE) { s->resetlevel = val; if (val & 0x100) - cpu_abort(cpu_single_env, "Board reset\n"); + qemu_system_reset_request (); } break; case 0x44: /* PCICTL */ Index: hw/realview.c =================================================================== RCS file: /sources/qemu/qemu/hw/realview.c,v retrieving revision 1.1 diff -u -d -p -r1.1 realview.c --- hw/realview.c 23 Sep 2006 17:40:58 -0000 1.1 +++ hw/realview.c 15 Nov 2006 00:02:37 -0000 @@ -10,6 +10,18 @@ #include "vl.h" #include "arm_pic.h" +static void main_cpu_reset(void *opaque) +{ + CPUState *env = opaque; + + cpu_reset(env); + cpu_arm_set_model(env, ARM_CPUID_ARM926); + if (env->kernel_filename) + arm_load_kernel(env->ram_size, env->kernel_filename, + env->kernel_cmdline, env->initrd_filename, + env->board_id); +} + /* Board init. */ static void realview_init(int ram_size, int vga_ram_size, int boot_device, @@ -32,6 +44,7 @@ static void realview_init(int ram_size, /* SDRAM at address zero. */ cpu_register_physical_memory(0, ram_size, IO_MEM_RAM); + qemu_register_reset(main_cpu_reset, env); arm_sysctl_init(0x10000000, 0xc1400400); pic = arm_pic_init_cpu(env); /* ??? The documentation says GIC1 is nFIQ and either GIC2 or GIC3 @@ -129,6 +142,11 @@ static void realview_init(int ram_size, arm_load_kernel(ram_size, kernel_filename, kernel_cmdline, initrd_filename, 0x33b); + env->ram_size = ram_size; + env->kernel_filename = kernel_filename; + env->kernel_cmdline = kernel_cmdline; + env->initrd_filename = initrd_filename; + env->board_id = 0x33b; } QEMUMachine realview_machine = { Index: hw/versatilepb.c =================================================================== RCS file: /sources/qemu/qemu/hw/versatilepb.c,v retrieving revision 1.6 diff -u -d -p -r1.6 versatilepb.c --- hw/versatilepb.c 23 Sep 2006 17:40:58 -0000 1.6 +++ hw/versatilepb.c 15 Nov 2006 00:02:37 -0000 @@ -145,6 +145,18 @@ static vpb_sic_state *vpb_sic_init(uint3 return s; } +static void main_cpu_reset(void *opaque) +{ + CPUState *env = opaque; + + cpu_reset(env); + cpu_arm_set_model(env, ARM_CPUID_ARM926); + if (env->kernel_filename) + arm_load_kernel(env->ram_size, env->kernel_filename, + env->kernel_cmdline, env->initrd_filename, + env->board_id); +} + /* Board init. */ /* The AB and PB boards both use the same core, just with different @@ -171,6 +183,7 @@ static void versatile_init(int ram_size, /* SDRAM at address zero. */ cpu_register_physical_memory(0, ram_size, IO_MEM_RAM); + qemu_register_reset(main_cpu_reset, env); arm_sysctl_init(0x10000000, 0x41007004); pic = arm_pic_init_cpu(env); pic = pl190_init(0x10140000, pic, ARM_PIC_CPU_IRQ, ARM_PIC_CPU_FIQ); @@ -252,6 +265,11 @@ static void versatile_init(int ram_size, arm_load_kernel(ram_size, kernel_filename, kernel_cmdline, initrd_filename, board_id); + env->ram_size = ram_size; + env->kernel_filename = kernel_filename; + env->kernel_cmdline = kernel_cmdline; + env->initrd_filename = initrd_filename; + env->board_id = board_id; } static void vpb_init(int ram_size, int vga_ram_size, int boot_device, Index: target-arm/cpu.h =================================================================== RCS file: /sources/qemu/qemu/target-arm/cpu.h,v retrieving revision 1.17 diff -u -d -p -r1.17 cpu.h --- target-arm/cpu.h 22 Oct 2006 11:54:30 -0000 1.17 +++ target-arm/cpu.h 15 Nov 2006 00:02:37 -0000 @@ -120,6 +120,11 @@ typedef struct CPUARMState { CPU_COMMON + int ram_size; + const char *kernel_filename; + const char *kernel_cmdline; + const char *initrd_filename; + int board_id; } CPUARMState; CPUARMState *cpu_arm_init(void); Index: target-arm/helper.c =================================================================== RCS file: /sources/qemu/qemu/target-arm/helper.c,v retrieving revision 1.7 diff -u -d -p -r1.7 helper.c --- target-arm/helper.c 9 Sep 2006 14:36:26 -0000 1.7 +++ target-arm/helper.c 15 Nov 2006 00:02:37 -0000 @@ -7,6 +7,7 @@ void cpu_reset(CPUARMState *env) { + memset(env, 0, offsetof(CPUARMState, breakpoints)); #if defined (CONFIG_USER_ONLY) env->uncached_cpsr = ARM_CPU_MODE_USR; env->vfp.xregs[ARM_VFP_FPEXC] = 1 << 30; @@ -16,6 +17,7 @@ void cpu_reset(CPUARMState *env) env->vfp.xregs[ARM_VFP_FPEXC] = 0; #endif env->regs[15] = 0; + tlb_flush(env, 1); } CPUARMState *cpu_arm_init(void) @@ -27,7 +29,6 @@ CPUARMState *cpu_arm_init(void) return NULL; cpu_exec_init(env); cpu_reset(env); - tlb_flush(env, 1); return env; }