From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1GpXaA-0001vU-TS for qemu-devel@nongnu.org; Wed, 29 Nov 2006 17:07:11 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1GpXa7-0001se-1a for qemu-devel@nongnu.org; Wed, 29 Nov 2006 17:07:10 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1GpXa6-0001sZ-Rg for qemu-devel@nongnu.org; Wed, 29 Nov 2006 17:07:06 -0500 Received: from [65.74.133.4] (helo=mail.codesourcery.com) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA:32) (Exim 4.52) id 1GpXa6-0001Qj-Dw for qemu-devel@nongnu.org; Wed, 29 Nov 2006 17:07:06 -0500 From: Paul Brook Subject: Re: [Qemu-devel] [PATCH 6/6, UPDATE] A cumulative MIPS patchset Date: Wed, 29 Nov 2006 22:06:57 +0000 References: <20061129145041.GA2777@networkno.de> In-Reply-To: <20061129145041.GA2777@networkno.de> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200611292206.59417.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org > The emulated CPU still identifies itself as a MIPS32(R1) 4Kc. > Currently it doesn't throw a RI exception for R2 instructions, this > is useful for Linux userland emulation, and also follows the current > policy which doesn't distinguish between MIPS32R1 instructions and > those of earlier ISAs. I thought this was an accident/omission rather than a policy. I recommend making the ISA features optional, even it it's controlled by a compile-time directive that's always on. It's much easier to do this when adding the insns then to retro-fit it afterwards. Paul