From: Paul Brook <paul@codesourcery.com>
To: qemu-devel@nongnu.org, Alexander Voropay <alec@nwpi.ru>
Subject: Re: [Qemu-devel] [RFC] IRQ acknowledge on MIPS
Date: Tue, 23 Jan 2007 15:40:51 +0000 [thread overview]
Message-ID: <200701231540.52240.paul@codesourcery.com> (raw)
In-Reply-To: <00f801c73f03$0b552650$e90d11ac@spb.in.rosprint.ru>
> It should be good to have a well-defined modular IRQ routing
> architecture in the Qemu.
We've got most of one for the ARM targets (see hw/arm_pic.h). This file
contains both the target independent bits and the ARM specific bits for
emulating the CPU IRQ/FIQ pins.
Annother possibility to abstract this to use a single interrupt line object
rather than an {object,index} pair. This simplifies code that that raises
interrupts, at the expense of some complication in the code to create
interrupt controllers.
Paul
next prev parent reply other threads:[~2007-01-23 15:41 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-01-23 0:48 [Qemu-devel] [RFC] IRQ acknowledge on MIPS Aurelien Jarno
2007-01-23 9:01 ` Aurelien Jarno
2007-01-23 15:27 ` Alexander Voropay
2007-01-23 15:40 ` Paul Brook [this message]
2007-01-23 20:22 ` Fabrice Bellard
2007-01-23 16:36 ` Aurelien Jarno
2007-01-23 9:06 ` Marius Groeger
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