From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1HI7m6-0007iE-5u for qemu-devel@nongnu.org; Fri, 16 Feb 2007 13:25:38 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1HI7m4-0007i1-2m for qemu-devel@nongnu.org; Fri, 16 Feb 2007 13:25:37 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1HI7m3-0007hy-VY for qemu-devel@nongnu.org; Fri, 16 Feb 2007 13:25:36 -0500 Received: from mail.codesourcery.com ([65.74.133.4]) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA:32) (Exim 4.52) id 1HI7m3-0003CR-H3 for qemu-devel@nongnu.org; Fri, 16 Feb 2007 13:25:35 -0500 From: Paul Brook Subject: Re: [Qemu-devel] Potential sparc32 MMU bug Date: Fri, 16 Feb 2007 18:25:27 +0000 References: <200702161701.59960.paul@codesourcery.com> In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200702161825.28020.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Cc: qemu-devel@nongnu.org > > I don't know about sparc, but it's normal for writes to ROM to be > > ignored. However by my reading the sparc bios is loaded into RAM anyway, > > so it shouldn't matter. > > It definitely gets blocked by something: if I leave the the trap table > in the .text section, the write silently fails. If I move the trap > table to the .data section, the write succeeds. If I move the trap > table over to .rodata, the write fails again. What are you looking at > that suggests the whole sparc bios is loaded read/write? I was mistaken. There is a ROM area defined, it's just the elf loader doesn't care whether it's loading to rom or ram. My comment about rom writes being silently ignored still applies. Paul