From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1HSDRM-0001Yo-0A for qemu-devel@nongnu.org; Fri, 16 Mar 2007 10:29:56 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1HSDRK-0001X6-9k for qemu-devel@nongnu.org; Fri, 16 Mar 2007 10:29:55 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1HSDRJ-0001Ws-UB for qemu-devel@nongnu.org; Fri, 16 Mar 2007 09:29:53 -0500 Received: from mail.codesourcery.com ([65.74.133.4]) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1HSDQB-0007iW-Td for qemu-devel@nongnu.org; Fri, 16 Mar 2007 10:28:44 -0400 From: Paul Brook Subject: Re: [Qemu-devel] Redundant repz prefixes in generated amd64 code Date: Fri, 16 Mar 2007 14:28:35 +0000 References: <200703161415.21283.jseward@acm.org> In-Reply-To: <200703161415.21283.jseward@acm.org> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200703161428.36897.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Friday 16 March 2007 14:15, Julian Seward wrote: > I'm seeing redundant repz (0xF3) prefixes in generated code, typically > just before jumps: > > : repz mov $0xe07f,%eax > : mov %eax,0x20(%rbp) > : lea -25168302(%rip),%ebx # 0xaf0420 > : retq > : mov -25168245(%rip),%eax # 0xaf0460 > : jmpq *%rax > : repz mov $0xe092,%eax > : mov %eax,0x20(%rbp) > : lea -25168325(%rip),%ebx # 0xaf0421 > : retq > > I assume these are something to do with translation chaining/unchaining but > have been unable to figure out where they come from. 0000000000008b50 : 8b50: 8b 05 00 00 00 00 mov 0(%rip),%eax 8b52: R_X86_64_PC32 __op_param1+0x3c 8b56: ff e0 jmpq *%rax 8b58: f3 c3 repz retq qemu only strips the final ret off. The prefixed ret is to avoid prefetch stalls on amd cpus. Paul