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From: Paul Brook <paul@codesourcery.com>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] Redundant repz prefixes in generated amd64 code
Date: Fri, 16 Mar 2007 18:14:57 +0000	[thread overview]
Message-ID: <200703161814.58615.paul@codesourcery.com> (raw)
In-Reply-To: <200703161445.25051.jseward@acm.org>

> > 0000000000008b50 <op_goto_tb1>:
> >     8b50:       8b 05 00 00 00 00       mov    0(%rip),%eax
> >                         8b52: R_X86_64_PC32     __op_param1+0x3c
> >     8b56:       ff e0                   jmpq   *%rax
> >     8b58:       f3 c3                   repz retq
> >
> > qemu only strips the final ret off.
> > The prefixed ret is to avoid prefetch stalls on amd cpus.
>
> So the implication of this is that the generated code just happens to
> work only because the dangling F3 never ends up in front of some other
> instruction which it would change the meaning of?

Correct.

Paul

  reply	other threads:[~2007-03-16 18:16 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-03-16 14:15 [Qemu-devel] Redundant repz prefixes in generated amd64 code Julian Seward
2007-03-16 14:28 ` Paul Brook
2007-03-16 14:45   ` Julian Seward
2007-03-16 18:14     ` Paul Brook [this message]
2007-03-16 19:30 ` Igor Kovalenko
2007-03-16 23:06   ` Julian Seward
2007-03-17  7:35   ` axel
2007-03-17  9:51     ` Johannes Schindelin
2007-03-17 11:16       ` Axel Zeuner

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