From: Thiemo Seufer <ths@networkno.de>
To: Alexander Voropay <alec@nwpi.ru>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [Bug] [Patch] MIPS code fails at branch instruction
Date: Tue, 20 Mar 2007 09:51:50 +0000 [thread overview]
Message-ID: <20070320095150.GA2311@networkno.de> (raw)
In-Reply-To: <054b01c76ac5$0d431470$e90d11ac@spb.in.rosprint.ru>
Alexander Voropay wrote:
> "Thiemo Seufer" <ths@networkno.de> wrote:
>
> >For the AR7 case, could you
> >- add AR7 as a CPU type
> >- handle the interesting cases for AR7 only, after verifying the
> > cornercase behaviour of qemu and real hardware is consistent.
>
> AFAIK, Texas Instrument AR7 isn't a CPU. It's a SoC which
> combines well-known MIPS 4KEc synthesizable *core* and ADSL stuff.
Other 4KEc behave differently (probably due to differences in the
synthesizing technology used), so I figure AR7 becomes a special
CPU for qemu's purposes.
Thiemo
next prev parent reply other threads:[~2007-03-20 9:56 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-03-16 23:12 [Qemu-devel] [Bug] MIPS code fails at branch instruction Stefan Weil
2007-03-17 0:46 ` Thiemo Seufer
2007-03-17 11:37 ` Stefan Weil
2007-03-17 14:31 ` Thiemo Seufer
2007-03-17 18:57 ` Stefan Weil
2007-03-17 20:32 ` Paul Brook
2007-03-19 21:04 ` [Qemu-devel] [Bug] [Patch] " Stefan Weil
2007-03-19 21:34 ` Thiemo Seufer
2007-03-19 22:34 ` Thiemo Seufer
2007-03-20 7:54 ` Alexander Voropay
2007-03-20 9:51 ` Thiemo Seufer [this message]
2007-03-20 18:27 ` Stefan Weil
2007-03-25 0:22 ` Thiemo Seufer
2007-03-25 1:43 ` Aurelien Jarno
2007-03-25 12:51 ` Stuart Brady
2007-03-25 16:26 ` Thiemo Seufer
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