From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1HY6gP-0001bY-2G for qemu-devel@nongnu.org; Sun, 01 Apr 2007 16:29:49 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1HY6gO-0001aW-AM for qemu-devel@nongnu.org; Sun, 01 Apr 2007 16:29:48 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1HY6gO-0001a1-4N for qemu-devel@nongnu.org; Sun, 01 Apr 2007 16:29:48 -0400 Received: from farad.aurel32.net ([82.232.2.251] helo=mail.aurel32.net) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1HY6dQ-00071D-1S for qemu-devel@nongnu.org; Sun, 01 Apr 2007 16:26:44 -0400 Date: Sun, 1 Apr 2007 22:26:40 +0200 From: Aurelien Jarno Message-ID: <20070401202639.GA6871@amd64.aurel32.net> References: <460FEC40.60001@aurel32.net> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <460FEC40.60001@aurel32.net> Subject: [Qemu-devel] [PATCH][SPARC] mem_address_not_aligned trap for unaligned PC and load/store Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Blue Swirl Cc: qemu-devel@nongnu.org On Sun, Apr 01, 2007 at 07:30:40PM +0200, Aurelien Jarno wrote: > Blue Swirl a écrit : > >> According to the SPARCv8 and SPARCv9 manuals, the jmpl, rett and return > >> instructions should generate a mem_address_not_aligned trap if either > >> of the low-order two bits of the target address is nonzero. > > > > This is true, but in that case alignment should be enforced for loads ands > > stores as well. The checks also incur a performance penalty for little > > advantage. Maybe the checks should be enabled only with a compile/run-time > > option. > > > > I also have a patch for load/store, but openbios is doing a few > unaligned memory accesses, so the patch can't be used until openbios is > fixed. > I have finally been able to found and fix the bug in openbios. I have send a patch to the openbios mailing list. The patch and the fixed bios is available on http://temp.aurel32.net . The patch below is for QEMU and implements mem_address_not_aligned for unaligned PC (jmpl, rett and return instructions) and for load/store operations. I will try to do some benchmarks about the performance penality, but I think it is very small. The patch basically adds 2 or 3 host assembly instructions for each load/store, jmpl, rett or return instruction. Index: target-sparc/cpu.h =================================================================== RCS file: /sources/qemu/qemu/target-sparc/cpu.h,v retrieving revision 1.32 diff -u -d -p -r1.32 cpu.h --- target-sparc/cpu.h 1 Apr 2007 15:15:36 -0000 1.32 +++ target-sparc/cpu.h 1 Apr 2007 19:26:57 -0000 @@ -35,6 +35,7 @@ #define TT_NFPU_INSN 0x04 #define TT_WIN_OVF 0x05 #define TT_WIN_UNF 0x06 +#define TT_UNALIGNED 0x07 #define TT_FP_EXCP 0x08 #define TT_DFAULT 0x09 #define TT_TOVF 0x0a @@ -55,6 +56,7 @@ #define TT_DFAULT 0x30 #define TT_DMISS 0x31 #define TT_DPROT 0x32 +#define TT_UNALIGNED 0x34 #define TT_PRIV_ACT 0x37 #define TT_EXTINT 0x40 #define TT_SPILL 0x80 Index: target-sparc/op.c =================================================================== RCS file: /sources/qemu/qemu/target-sparc/op.c,v retrieving revision 1.27 diff -u -d -p -r1.27 op.c --- target-sparc/op.c 1 Apr 2007 15:38:17 -0000 1.27 +++ target-sparc/op.c 1 Apr 2007 19:26:57 -0000 @@ -1486,7 +1486,10 @@ void OPPROTO op_movl_npc_im(void) void OPPROTO op_movl_npc_T0(void) { - env->npc = T0; + if (T0 & 0x3) + raise_exception(TT_UNALIGNED); + else + env->npc = T0; } void OPPROTO op_mov_pc_npc(void) Index: target-sparc/op_helper.c =================================================================== RCS file: /sources/qemu/qemu/target-sparc/op_helper.c,v retrieving revision 1.23 diff -u -d -p -r1.23 op_helper.c --- target-sparc/op_helper.c 1 Apr 2007 15:15:36 -0000 1.23 +++ target-sparc/op_helper.c 1 Apr 2007 19:26:57 -0000 @@ -872,7 +872,10 @@ void do_interrupt(int intno) #if !defined(CONFIG_USER_ONLY) +static void do_unaligned_access (target_ulong addr, int is_write, int is_user, void *retaddr); + #define MMUSUFFIX _mmu +#define ALIGNED_ONLY #define GETPC() (__builtin_return_address(0)) #define SHIFT 0 @@ -887,6 +890,11 @@ void do_interrupt(int intno) #define SHIFT 3 #include "softmmu_template.h" +static void do_unaligned_access (target_ulong addr, int is_write, int is_user, void *retaddr) +{ + /* Comment the following line to disable mem_address_not_aligned traps */ + raise_exception(TT_UNALIGNED); +} /* try to fill the TLB and return an exception if error. If retaddr is NULL, it means that the function was called in C code (i.e. not Index: target-sparc/translate.c =================================================================== RCS file: /sources/qemu/qemu/target-sparc/translate.c,v retrieving revision 1.44 diff -u -d -p -r1.44 translate.c --- target-sparc/translate.c 1 Apr 2007 16:23:36 -0000 1.44 +++ target-sparc/translate.c 1 Apr 2007 19:26:57 -0000 @@ -25,7 +25,6 @@ Rest of V9 instructions, VIS instructions NPC/PC static optimisations (use JUMP_TB when possible) Optimize synthetic instructions - Optional alignment check 128-bit float */ -- .''`. Aurelien Jarno | GPG: 1024D/F1BCDB73 : :' : Debian developer | Electrical Engineer `. `' aurel32@debian.org | aurelien@aurel32.net `- people.debian.org/~aurel32 | www.aurel32.net