From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1HaHqa-0004Ri-Br for qemu-devel@nongnu.org; Sat, 07 Apr 2007 16:49:20 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1HaHqW-0004Dx-Iv for qemu-devel@nongnu.org; Sat, 07 Apr 2007 16:49:19 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1HaHqW-0004DN-EV for qemu-devel@nongnu.org; Sat, 07 Apr 2007 16:49:16 -0400 Received: from mail.codesourcery.com ([65.74.133.4]) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1HaHms-00055z-KF for qemu-devel@nongnu.org; Sat, 07 Apr 2007 16:45:30 -0400 From: Paul Brook Subject: Re: [Qemu-devel] qemu Makefile.target vl.h hw/acpi.c hw/adlib.c ... Date: Sat, 7 Apr 2007 21:45:26 +0100 References: <200704072010.05798.paul@codesourcery.com> <1175977726.1516.15.camel@rapid> In-Reply-To: <1175977726.1516.15.camel@rapid> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200704072145.27203.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: "J. Mayer" On Saturday 07 April 2007 21:28, J. Mayer wrote: > On Sat, 2007-04-07 at 20:10 +0100, Paul Brook wrote: > > On Saturday 07 April 2007 19:32, J. Mayer wrote: > > > On Sat, 2007-04-07 at 18:14 +0000, Paul Brook wrote: > > > > CVSROOT: /sources/qemu > > > > Module name: qemu > > > > Changes by: Paul Brook 07/04/07 18:14:41 > > > > > > The patches in the PowerPC target seem complete nonsense. > > > > Can you give specific examples? > > I'm talking about the CPU code. > There is NO notion of external IRQ allocation in the PowerPC > specification. Quoting from ppc.c (both before and after my patch): /*****************************************************************************/ /* PowerPC internal fake IRQ controller * used to manage multiple sources hardware events My patch did not change how this worked at all. It just changed it from using an ad-hoc system of callpacks and opaque parameters to using a standard mechanism for connecting interrupt sources, be they internal or external. MIPS works exactly the same way. > Where do you see that a > machine with a PowerPC cannot manage more than 32 IRQ ? Any PPC that needs more that 32 internal interrupt sources is already broken. Notice how the old bitmask is a uint32_t. > SO your patch is a complete nonsense and YES IT BREAKS MY WORKS SO IT > HAS TO BE REVERTED. I can only fix the code that I have access to. IMHO your request that I revert changes because they allegedly break code that noone else has access to is unreasonable. My changes are a significant cleanup to qemu internals. However if there is agreement from other maintainers I will revert my patch. Paul