From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Hk4Tt-0004F8-V2 for qemu-devel@nongnu.org; Fri, 04 May 2007 16:34:22 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Hk4Ts-0004Ej-Jq for qemu-devel@nongnu.org; Fri, 04 May 2007 16:34:21 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Hk4Ts-0004Eg-Cr for qemu-devel@nongnu.org; Fri, 04 May 2007 16:34:20 -0400 Received: from mail.codesourcery.com ([65.74.133.4]) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1Hk4NC-0007qz-5o for qemu-devel@nongnu.org; Fri, 04 May 2007 16:27:26 -0400 From: Paul Brook Subject: Re: [Qemu-devel] [BUG] QEMU crash during cpu reset (MIPS regression) Date: Fri, 4 May 2007 21:27:20 +0100 References: <463B939A.1090508@mail.berlios.de> In-Reply-To: <463B939A.1090508@mail.berlios.de> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-15" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200705042127.21769.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org > We can either re-arrange the entries in CPUMIPSState > (move those which must not be zero'ed to the end), or > cpu_reset must call cpu_mips_register. > > Which solution is better? ARM uses the latter solution. IMHO it's better to do that than try and extend the hacks were some fields are left untouched by a reset. Paul