[Qemu-devel] [PATCH, MIPS64] dmult & dmultu emulation

[Qemu-devel] [PATCH, MIPS64] dmult & dmultu emulation

[Aurelien Jarno]

Hi,

The patch below fixes the emulation of dmult and dmultu by doing a real
64x64 -> 128 multiplication.

On x86_64, it uses the mul/imul instruction, an equivalent C code (but
much slower) is provided for other architectures.

Cheers,
Aurelien


Index: target-mips/op_helper.c
===================================================================
RCS file: /sources/qemu/qemu/target-mips/op_helper.c,v
retrieving revision 1.45
diff -u -d -p -r1.45 op_helper.c
--- target-mips/op_helper.c	13 May 2007 19:22:13 -0000	1.45
+++ target-mips/op_helper.c	15 May 2007 20:40:12 -0000
@@ -230,16 +230,49 @@ void do_div (void)
 #ifdef TARGET_MIPS64
 void do_dmult (void)
 {
-    env->LO = (int64_t)T0 * (int64_t)T1;
-    /* XXX */
-    env->HI = (env->LO | (1ULL << 63)) ? ~0ULL : 0ULL;
+#if defined(__x86_64__)
+    __asm__ ("imul %0\n\t"
+             : "=d" (env->HI), "=a" (env->LO)
+             : "a" (T0), "0" (T1)
+             );
+#else
+    int64_t ph;
+    uint64_t pm1, pm2, pl;
+
+    pl = (uint64_t)((uint32_t)T0) * (uint64_t)((uint32_t)T1);
+    pm1 = ((int64_t)T0 >> 32) * (uint32_t)T1;
+    pm2 = (uint32_t)T0 * ((int64_t)T1 >> 32);
+    ph = ((int64_t)T0 >> 32) * ((int64_t)T1 >> 32);
+
+    ph += ((int64_t)pm1) >> 32;	
+    pm1 = (uint64_t)((uint32_t)pm1) + pm2 + (pl >> 32);
+
+    env->HI = ph + ((int64_t)pm1) >> 32;
+    env->LO = (pm1 << 32) + (uint32_t)pl;
+#endif
 }
 
 void do_dmultu (void)
 {
-    env->LO = T0 * T1;
-    /* XXX */
-    env->HI = 0;
+#if defined(__x86_64__)
+    __asm__ ("mul %0\n\t"
+             : "=d" (env->HI), "=a" (env->LO)
+             : "a" (T0), "0" (T1)
+            );
+#else
+    uint64_t ph, pm1, pm2, pl;
+
+    pl = (uint64_t)((uint32_t)T0) * (uint64_t)((uint32_t)T1);
+    pm1 = (T0 >> 32) * (uint32_t)T1;
+    pm2 = (uint32_t)T0 * (T1 >> 32);
+    ph = (T0 >> 32) * (T1 >> 32);
+
+    ph += pm1 >> 32;
+    pm1 = (uint64_t)((uint32_t)pm1) + pm2 + (pl >> 32);
+
+    env->HI = ph + (pm1 >> 32);
+    env->LO = (pm1 << 32) + (uint32_t)pl;
+#endif
 }
 
 void do_ddiv (void)

-- 
  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   aurel32@debian.org         | aurelien@aurel32.net
   `-    people.debian.org/~aurel32 | www.aurel32.net

Re: [Qemu-devel] [PATCH, MIPS64] dmult & dmultu emulation

[Paul Brook]

> The patch below fixes the emulation of dmult and dmultu by doing a real
> 64x64 -> 128 multiplication.

Can we share the implementation between targets please. We already have an 
implementation of mul64 in target-i386/helper.c.

I've no real preference which implementation we use, I just don't want there 
to be several of them.

Paul

Re: [Qemu-devel] [PATCH, MIPS64] dmult & dmultu emulation

[Aurelien Jarno]

On Tue, May 15, 2007 at 10:07:00PM +0100, Paul Brook wrote:
> > The patch below fixes the emulation of dmult and dmultu by doing a real
> > 64x64 -> 128 multiplication.
> 
> Can we share the implementation between targets please. We already have an 
> implementation of mul64 in target-i386/helper.c.
> 
> I've no real preference which implementation we use, I just don't want there 
> to be several of them.

Ok, please find an updated patch below. The multiplications functions
are in mul64.c and are now shared by the i386 and mips targets.

Bye,
Aurelien

Index: Makefile.target
===================================================================
RCS file: /sources/qemu/qemu/Makefile.target,v
retrieving revision 1.169
diff -u -d -p -r1.169 Makefile.target
--- Makefile.target	8 May 2007 21:05:55 -0000	1.169
+++ Makefile.target	15 May 2007 23:37:00 -0000
@@ -365,6 +365,7 @@ endif
 # must use static linking to avoid leaving stuff in virtual address space
 VL_OBJS=vl.o osdep.o readline.o monitor.o pci.o console.o loader.o isa_mmio.o
 VL_OBJS+=cutils.o
+VL_OBJS+=mul64.o
 VL_OBJS+=block.o block-raw.o
 VL_OBJS+=block-cow.o block-qcow.o aes.o block-vmdk.o block-cloop.o block-dmg.o block-bochs.o block-vpc.o block-vvfat.o block-qcow2.o
 VL_OBJS+=irq.o
Index: exec-all.h
===================================================================
RCS file: /sources/qemu/qemu/exec-all.h,v
retrieving revision 1.54
diff -u -d -p -r1.54 exec-all.h
--- exec-all.h	10 May 2007 00:33:40 -0000	1.54
+++ exec-all.h	15 May 2007 23:37:00 -0000
@@ -78,6 +78,9 @@ void optimize_flags_init(void);
 extern FILE *logfile;
 extern int loglevel;
 
+void muls64(int64_t *phigh, int64_t *plow, int64_t a, int64_t b);
+void mulu64(uint64_t *phigh, uint64_t *plow, uint64_t a, uint64_t b);
+
 int gen_intermediate_code(CPUState *env, struct TranslationBlock *tb);
 int gen_intermediate_code_pc(CPUState *env, struct TranslationBlock *tb);
 void dump_ops(const uint16_t *opc_buf, const uint32_t *opparam_buf);
Index: target-i386/helper.c
===================================================================
RCS file: /sources/qemu/qemu/target-i386/helper.c,v
retrieving revision 1.80
diff -u -d -p -r1.80 helper.c
--- target-i386/helper.c	18 Apr 2007 11:15:56 -0000	1.80
+++ target-i386/helper.c	15 May 2007 23:37:00 -0000
@@ -3620,50 +3620,6 @@ static void neg128(uint64_t *plow, uint6
     add128(plow, phigh, 1, 0);
 }
 
-static void mul64(uint64_t *plow, uint64_t *phigh, uint64_t a, uint64_t b)
-{
-    uint32_t a0, a1, b0, b1;
-    uint64_t v;
-
-    a0 = a;
-    a1 = a >> 32;
-
-    b0 = b;
-    b1 = b >> 32;
-    
-    v = (uint64_t)a0 * (uint64_t)b0;
-    *plow = v;
-    *phigh = 0;
-
-    v = (uint64_t)a0 * (uint64_t)b1;
-    add128(plow, phigh, v << 32, v >> 32);
-    
-    v = (uint64_t)a1 * (uint64_t)b0;
-    add128(plow, phigh, v << 32, v >> 32);
-    
-    v = (uint64_t)a1 * (uint64_t)b1;
-    *phigh += v;
-#ifdef DEBUG_MULDIV
-    printf("mul: 0x%016" PRIx64 " * 0x%016" PRIx64 " = 0x%016" PRIx64 "%016" PRIx64 "\n",
-           a, b, *phigh, *plow);
-#endif
-}
-
-static void imul64(uint64_t *plow, uint64_t *phigh, int64_t a, int64_t b)
-{
-    int sa, sb;
-    sa = (a < 0);
-    if (sa)
-        a = -a;
-    sb = (b < 0);
-    if (sb)
-        b = -b;
-    mul64(plow, phigh, a, b);
-    if (sa ^ sb) {
-        neg128(plow, phigh);
-    }
-}
-
 /* return TRUE if overflow */
 static int div64(uint64_t *plow, uint64_t *phigh, uint64_t b)
 {
@@ -3731,7 +3687,7 @@ void helper_mulq_EAX_T0(void)
 {
     uint64_t r0, r1;
 
-    mul64(&r0, &r1, EAX, T0);
+    mulu64(&r1, &r0, EAX, T0);
     EAX = r0;
     EDX = r1;
     CC_DST = r0;
@@ -3742,7 +3698,7 @@ void helper_imulq_EAX_T0(void)
 {
     uint64_t r0, r1;
 
-    imul64(&r0, &r1, EAX, T0);
+    muls64(&r1, &r0, EAX, T0);
     EAX = r0;
     EDX = r1;
     CC_DST = r0;
@@ -3753,7 +3709,7 @@ void helper_imulq_T0_T1(void)
 {
     uint64_t r0, r1;
 
-    imul64(&r0, &r1, T0, T1);
+    mulu64(&r1, &r0, T0, T1);
     T0 = r0;
     CC_DST = r0;
     CC_SRC = ((int64_t)r1 != ((int64_t)r0 >> 63));
Index: target-mips/exec.h
===================================================================
RCS file: /sources/qemu/qemu/target-mips/exec.h,v
retrieving revision 1.26
diff -u -d -p -r1.26 exec.h
--- target-mips/exec.h	13 May 2007 13:49:43 -0000	1.26
+++ target-mips/exec.h	15 May 2007 23:37:00 -0000
@@ -97,8 +97,6 @@ void do_ddiv (void);
 #if TARGET_LONG_BITS > HOST_LONG_BITS
 void do_ddivu (void);
 #endif
-void do_dmult (void);
-void do_dmultu (void);
 #endif
 void do_mfc0_random(void);
 void do_mfc0_count(void);
Index: target-mips/op.c
===================================================================
RCS file: /sources/qemu/qemu/target-mips/op.c,v
retrieving revision 1.54
diff -u -d -p -r1.54 op.c
--- target-mips/op.c	13 May 2007 19:22:13 -0000	1.54
+++ target-mips/op.c	15 May 2007 23:37:01 -0000
@@ -874,13 +874,13 @@ void op_msubu (void)
 #ifdef TARGET_MIPS64
 void op_dmult (void)
 {
-    CALL_FROM_TB0(do_dmult);
+    CALL_FROM_TB4(muls64, &(env->HI), &(env->LO), T0, T1);
     RETURN();
 }
 
 void op_dmultu (void)
 {
-    CALL_FROM_TB0(do_dmultu);
+    CALL_FROM_TB4(mulu64, &(env->HI), &(env->LO), T0, T1);
     RETURN();
 }
 #endif
Index: target-mips/op_helper.c
===================================================================
RCS file: /sources/qemu/qemu/target-mips/op_helper.c,v
retrieving revision 1.45
diff -u -d -p -r1.45 op_helper.c
--- target-mips/op_helper.c	13 May 2007 19:22:13 -0000	1.45
+++ target-mips/op_helper.c	15 May 2007 23:37:01 -0000
@@ -228,20 +228,6 @@ void do_div (void)
 #endif
 
 #ifdef TARGET_MIPS64
-void do_dmult (void)
-{
-    env->LO = (int64_t)T0 * (int64_t)T1;
-    /* XXX */
-    env->HI = (env->LO | (1ULL << 63)) ? ~0ULL : 0ULL;
-}
-
-void do_dmultu (void)
-{
-    env->LO = T0 * T1;
-    /* XXX */
-    env->HI = 0;
-}
-
 void do_ddiv (void)
 {
     if (T1 != 0) {
--- mul64.c	2007-05-05 22:37:06.310788953 +0200
+++ mul64.c	2007-05-16 01:35:26.000000000 +0200
@@ -0,0 +1,77 @@
+/*
+ * 64x64 -> 128 multiplication
+ * 
+ * Copyright (c) 2007 Aurelien Jarno
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "vl.h"
+
+/* Signed 64x64 -> 128 multiplication */
+
+void muls64(int64_t *phigh, int64_t *plow, int64_t a, int64_t b)
+{
+#if defined(__x86_64__)
+    __asm__ ("imul %0\n\t"
+             : "=d" (*phigh), "=a" (*plow)
+             : "a" (a), "0" (b)
+             );
+#else
+    int64_t ph;
+    uint64_t pm1, pm2, pl;
+
+    pl = (uint64_t)((uint32_t)a) * (uint64_t)((uint32_t)b);
+    pm1 = (a >> 32) * (uint32_t)b;
+    pm2 = (uint32_t)a * (b >> 32);
+    ph = (a >> 32) * (b >> 32);
+
+    ph += (int64_t)pm1 >> 32;	
+    pm1 = (uint64_t)((uint32_t)pm1) + pm2 + (pl >> 32);
+
+    *phigh = ph + ((int64_t)pm1 >> 32);
+    *plow = (pm1 << 32) + (uint32_t)pl;
+#endif
+}
+
+
+/* Unsigned 64x64 -> 128 multiplication */
+void mulu64(uint64_t *phigh, uint64_t *plow, uint64_t a, uint64_t b)
+{
+#if defined(__x86_64__)
+    __asm__ ("mul %0\n\t"
+             : "=d" (*phigh), "=a" (*plow)
+             : "a" (a), "0" (b)
+            );
+#else
+    uint64_t ph, pm1, pm2, pl;
+
+    pl = (uint64_t)((uint32_t)a) * (uint64_t)((uint32_t)b);
+    pm1 = (a >> 32) * (uint32_t)b;
+    pm2 = (uint32_t)a * (b >> 32);
+    ph = (a >> 32) * (b >> 32);
+
+    ph += pm1 >> 32;
+    pm1 = (uint64_t)((uint32_t)pm1) + pm2 + (pl >> 32);
+
+    *phigh = ph + (pm1 >> 32);
+    *plow = (pm1 << 32) + (uint32_t)pl;
+#endif
+}
+

-- 
  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   aurel32@debian.org         | aurelien@aurel32.net
   `-    people.debian.org/~aurel32 | www.aurel32.net

Re: [Qemu-devel] [PATCH, MIPS64] dmult & dmultu emulation

[Aurelien Jarno]

On Wed, May 16, 2007 at 02:00:14AM +0200, Aurelien Jarno wrote:
> On Tue, May 15, 2007 at 10:07:00PM +0100, Paul Brook wrote:
> > > The patch below fixes the emulation of dmult and dmultu by doing a real
> > > 64x64 -> 128 multiplication.
> > 
> > Can we share the implementation between targets please. We already have an 
> > implementation of mul64 in target-i386/helper.c.
> > 
> > I've no real preference which implementation we use, I just don't want there 
> > to be several of them.
> 
> Ok, please find an updated patch below. The multiplications functions
> are in mul64.c and are now shared by the i386 and mips targets.
> 

03:40 < pbrook> aurel32: I think you've got a sign mismatch in your target-i386/helper.c patch. You've replaced imul64 with mulu64.

I confirm I have made a mistake here, please find an updated patch
below.

Bye,
Aurelien

Index: Makefile.target
===================================================================
RCS file: /sources/qemu/qemu/Makefile.target,v
retrieving revision 1.169
diff -u -d -p -r1.169 Makefile.target
--- Makefile.target	8 May 2007 21:05:55 -0000	1.169
+++ Makefile.target	15 May 2007 23:37:00 -0000
@@ -365,6 +365,7 @@ endif
 # must use static linking to avoid leaving stuff in virtual address space
 VL_OBJS=vl.o osdep.o readline.o monitor.o pci.o console.o loader.o isa_mmio.o
 VL_OBJS+=cutils.o
+VL_OBJS+=mul64.o
 VL_OBJS+=block.o block-raw.o
 VL_OBJS+=block-cow.o block-qcow.o aes.o block-vmdk.o block-cloop.o block-dmg.o block-bochs.o block-vpc.o block-vvfat.o block-qcow2.o
 VL_OBJS+=irq.o
Index: exec-all.h
===================================================================
RCS file: /sources/qemu/qemu/exec-all.h,v
retrieving revision 1.54
diff -u -d -p -r1.54 exec-all.h
--- exec-all.h	10 May 2007 00:33:40 -0000	1.54
+++ exec-all.h	15 May 2007 23:37:00 -0000
@@ -78,6 +78,9 @@ void optimize_flags_init(void);
 extern FILE *logfile;
 extern int loglevel;
 
+void muls64(int64_t *phigh, int64_t *plow, int64_t a, int64_t b);
+void mulu64(uint64_t *phigh, uint64_t *plow, uint64_t a, uint64_t b);
+
 int gen_intermediate_code(CPUState *env, struct TranslationBlock *tb);
 int gen_intermediate_code_pc(CPUState *env, struct TranslationBlock *tb);
 void dump_ops(const uint16_t *opc_buf, const uint32_t *opparam_buf);
Index: target-i386/helper.c
===================================================================
RCS file: /sources/qemu/qemu/target-i386/helper.c,v
retrieving revision 1.80
diff -u -d -p -r1.80 helper.c
--- target-i386/helper.c	18 Apr 2007 11:15:56 -0000	1.80
+++ target-i386/helper.c	15 May 2007 23:37:00 -0000
@@ -3620,50 +3620,6 @@ static void neg128(uint64_t *plow, uint6
     add128(plow, phigh, 1, 0);
 }
 
-static void mul64(uint64_t *plow, uint64_t *phigh, uint64_t a, uint64_t b)
-{
-    uint32_t a0, a1, b0, b1;
-    uint64_t v;
-
-    a0 = a;
-    a1 = a >> 32;
-
-    b0 = b;
-    b1 = b >> 32;
-    
-    v = (uint64_t)a0 * (uint64_t)b0;
-    *plow = v;
-    *phigh = 0;
-
-    v = (uint64_t)a0 * (uint64_t)b1;
-    add128(plow, phigh, v << 32, v >> 32);
-    
-    v = (uint64_t)a1 * (uint64_t)b0;
-    add128(plow, phigh, v << 32, v >> 32);
-    
-    v = (uint64_t)a1 * (uint64_t)b1;
-    *phigh += v;
-#ifdef DEBUG_MULDIV
-    printf("mul: 0x%016" PRIx64 " * 0x%016" PRIx64 " = 0x%016" PRIx64 "%016" PRIx64 "\n",
-           a, b, *phigh, *plow);
-#endif
-}
-
-static void imul64(uint64_t *plow, uint64_t *phigh, int64_t a, int64_t b)
-{
-    int sa, sb;
-    sa = (a < 0);
-    if (sa)
-        a = -a;
-    sb = (b < 0);
-    if (sb)
-        b = -b;
-    mul64(plow, phigh, a, b);
-    if (sa ^ sb) {
-        neg128(plow, phigh);
-    }
-}
-
 /* return TRUE if overflow */
 static int div64(uint64_t *plow, uint64_t *phigh, uint64_t b)
 {
@@ -3731,7 +3687,7 @@ void helper_mulq_EAX_T0(void)
 {
     uint64_t r0, r1;
 
-    mul64(&r0, &r1, EAX, T0);
+    mulu64(&r1, &r0, EAX, T0);
     EAX = r0;
     EDX = r1;
     CC_DST = r0;
@@ -3742,7 +3698,7 @@ void helper_imulq_EAX_T0(void)
 {
     uint64_t r0, r1;
 
-    imul64(&r0, &r1, EAX, T0);
+    muls64(&r1, &r0, EAX, T0);
     EAX = r0;
     EDX = r1;
     CC_DST = r0;
@@ -3753,7 +3709,7 @@ void helper_imulq_T0_T1(void)
 {
     uint64_t r0, r1;
 
-    imul64(&r0, &r1, T0, T1);
+    muls64(&r1, &r0, T0, T1);
     T0 = r0;
     CC_DST = r0;
     CC_SRC = ((int64_t)r1 != ((int64_t)r0 >> 63));
Index: target-mips/exec.h
===================================================================
RCS file: /sources/qemu/qemu/target-mips/exec.h,v
retrieving revision 1.26
diff -u -d -p -r1.26 exec.h
--- target-mips/exec.h	13 May 2007 13:49:43 -0000	1.26
+++ target-mips/exec.h	15 May 2007 23:37:00 -0000
@@ -97,8 +97,6 @@ void do_ddiv (void);
 #if TARGET_LONG_BITS > HOST_LONG_BITS
 void do_ddivu (void);
 #endif
-void do_dmult (void);
-void do_dmultu (void);
 #endif
 void do_mfc0_random(void);
 void do_mfc0_count(void);
Index: target-mips/op.c
===================================================================
RCS file: /sources/qemu/qemu/target-mips/op.c,v
retrieving revision 1.54
diff -u -d -p -r1.54 op.c
--- target-mips/op.c	13 May 2007 19:22:13 -0000	1.54
+++ target-mips/op.c	15 May 2007 23:37:01 -0000
@@ -874,13 +874,13 @@ void op_msubu (void)
 #ifdef TARGET_MIPS64
 void op_dmult (void)
 {
-    CALL_FROM_TB0(do_dmult);
+    CALL_FROM_TB4(muls64, &(env->HI), &(env->LO), T0, T1);
     RETURN();
 }
 
 void op_dmultu (void)
 {
-    CALL_FROM_TB0(do_dmultu);
+    CALL_FROM_TB4(mulu64, &(env->HI), &(env->LO), T0, T1);
     RETURN();
 }
 #endif
Index: target-mips/op_helper.c
===================================================================
RCS file: /sources/qemu/qemu/target-mips/op_helper.c,v
retrieving revision 1.45
diff -u -d -p -r1.45 op_helper.c
--- target-mips/op_helper.c	13 May 2007 19:22:13 -0000	1.45
+++ target-mips/op_helper.c	15 May 2007 23:37:01 -0000
@@ -228,20 +228,6 @@ void do_div (void)
 #endif
 
 #ifdef TARGET_MIPS64
-void do_dmult (void)
-{
-    env->LO = (int64_t)T0 * (int64_t)T1;
-    /* XXX */
-    env->HI = (env->LO | (1ULL << 63)) ? ~0ULL : 0ULL;
-}
-
-void do_dmultu (void)
-{
-    env->LO = T0 * T1;
-    /* XXX */
-    env->HI = 0;
-}
-
 void do_ddiv (void)
 {
     if (T1 != 0) {
--- mul64.c	2007-05-05 22:37:06.310788953 +0200
+++ mul64.c	2007-05-16 01:35:26.000000000 +0200
@@ -0,0 +1,78 @@
+/*
+ * 64x64 -> 128 multiplication
+ * 
+ * Copyright (c) 2007 Aurelien Jarno
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "vl.h"
+
+/* Signed 64x64 -> 128 multiplication */
+
+void muls64(int64_t *phigh, int64_t *plow, int64_t a, int64_t b)
+{
+#if defined(__x86_64__)
+    __asm__ ("imul %0\n\t"
+             : "=d" (*phigh), "=a" (*plow)
+             : "a" (a), "0" (b)
+             );
+#else
+    int64_t ph;
+    uint64_t pm1, pm2, pl;
+
+    pl = (uint64_t)((uint32_t)a) * (uint64_t)((uint32_t)b);
+    pm1 = (a >> 32) * (uint32_t)b;
+    pm2 = (uint32_t)a * (b >> 32);
+    ph = (a >> 32) * (b >> 32);
+
+    ph += (int64_t)pm1 >> 32;	
+    pm1 = (uint64_t)((uint32_t)pm1) + pm2 + (pl >> 32);
+
+    *phigh = ph + ((int64_t)pm1 >> 32);
+    *plow = (pm1 << 32) + (uint32_t)pl;
+#endif
+}
+
+
+/* Unsigned 64x64 -> 128 multiplication */
+void mulu64(uint64_t *phigh, uint64_t *plow, uint64_t a, uint64_t b)
+{
+#if defined(__x86_64__)
+    __asm__ ("mul %0\n\t"
+             : "=d" (*phigh), "=a" (*plow)
+             : "a" (a), "0" (b)
+            );
+#else
+    uint64_t ph, pm1, pm2, pl;
+
+    pl = (uint64_t)((uint32_t)a) * (uint64_t)((uint32_t)b);
+    pm1 = (a >> 32) * (uint32_t)b;
+    pm2 = (uint32_t)a * (b >> 32);
+    ph = (a >> 32) * (b >> 32);
+
+    ph += pm1 >> 32;
+    pm1 = (uint64_t)((uint32_t)pm1) + pm2 + (pl >> 32);
+
+    *phigh = ph + (pm1 >> 32);
+    *plow = (pm1 << 32) + (uint32_t)pl;
+#endif
+}
+
+

-- 
  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   aurel32@debian.org         | aurelien@aurel32.net
   `-    people.debian.org/~aurel32 | www.aurel32.net

Re: [Qemu-devel] [PATCH, MIPS64] dmult & dmultu emulation

[Thiemo Seufer]

Aurelien Jarno wrote:
> On Wed, May 16, 2007 at 02:00:14AM +0200, Aurelien Jarno wrote:
> > On Tue, May 15, 2007 at 10:07:00PM +0100, Paul Brook wrote:
> > > > The patch below fixes the emulation of dmult and dmultu by doing a real
> > > > 64x64 -> 128 multiplication.
> > > 
> > > Can we share the implementation between targets please. We already have an 
> > > implementation of mul64 in target-i386/helper.c.
> > > 
> > > I've no real preference which implementation we use, I just don't want there 
> > > to be several of them.
> > 
> > Ok, please find an updated patch below. The multiplications functions
> > are in mul64.c and are now shared by the i386 and mips targets.
> > 
> 
> 03:40 < pbrook> aurel32: I think you've got a sign mismatch in your target-i386/helper.c patch. You've replaced imul64 with mulu64.
> 
> I confirm I have made a mistake here, please find an updated patch
> below.

I moved the file to host-utils.c, there may be more such functions
needed some day.


Thiemo

Re: [Qemu-devel] [PATCH, MIPS64] dmult & dmultu emulation

[C.W. Betts]

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Would this patch work with other 64-bit processors, or is it 
x86-64-only?  I'm mainly thinking about 64-bit PowerPCs, but I don't 
know if PowerPCs uses the same method.

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Re: [Qemu-devel] [PATCH, MIPS64] dmult & dmultu emulation

[Thiemo Seufer]

C.W. Betts wrote:
> Would this patch work with other 64-bit processors, or is it 
> x86-64-only?  I'm mainly thinking about 64-bit PowerPCs, but I don't 
> know if PowerPCs uses the same method.

You may have missed the x86-64 specific assembly code in there.


Thiemo

Re: [Qemu-devel] [PATCH, MIPS64] dmult & dmultu emulation

[Aurelien Jarno]

On Tue, May 15, 2007 at 07:26:22PM -0600, C.W. Betts wrote:
> Would this patch work with other 64-bit processors, or is it 
> x86-64-only?  I'm mainly thinking about 64-bit PowerPCs, but I don't 
> know if PowerPCs uses the same method.

This patch works on all hosts CPU using the C version, but it can use an
assembly version for x86_64. If there is the equivalent assembly 
instruction for 64-bit PowerPCs, it is possible to add it to this file.

-- 
  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   aurel32@debian.org         | aurelien@aurel32.net
   `-    people.debian.org/~aurel32 | www.aurel32.net