From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1HquUP-0002mF-Uw for qemu-devel@nongnu.org; Wed, 23 May 2007 13:19:09 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1HquUL-0002m3-Lu for qemu-devel@nongnu.org; Wed, 23 May 2007 13:19:08 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1HquUL-0002m0-Gv for qemu-devel@nongnu.org; Wed, 23 May 2007 13:19:05 -0400 Received: from mail.codesourcery.com ([65.74.133.4]) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1HquUK-0003MC-OJ for qemu-devel@nongnu.org; Wed, 23 May 2007 13:19:05 -0400 From: Paul Brook Subject: Re: [Qemu-devel] Timers Date: Wed, 23 May 2007 18:18:58 +0100 References: <200705230107.00962.paul@codesourcery.com> In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200705231818.59906.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Blue Swirl On Wednesday 23 May 2007, Blue Swirl wrote: > On 5/23/07, Paul Brook wrote: > > I get fed up of having to re-implement a simple countdown timer for every > > new board, so I've added a simple periodic timer implementation to cvs > > (ptimer.c). Currently only the Arm PrimeCell based boards use this, but > > I've a few other uses in the pipeline. > > Nice idea! On Sparc the timer can be configured to work in 64-bit > mode, so could the ptimer_get/set_count be changed to use 64-bit > values? In principle yes, though you may have to be careful to avoid overflows. The current API supports specifying either frequency (better for fast, large count timers) and period (better for slow, small count timers). We want to avoid breaking either extreme when adding 64-bit counters. Paul