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From: Paul Brook <paul@codesourcery.com>
Subject: Re: [Qemu-devel] Timers
Date: Wed, 23 May 2007 20:48:15 +0100
References: <200705230107.00962.paul@codesourcery.com>
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To: Blue Swirl <blauwirbel@gmail.com>
Cc: qemu-devel@nongnu.org

On Wednesday 23 May 2007, Blue Swirl wrote:
> On 5/23/07, Paul Brook <paul@codesourcery.com> wrote:
> > On Wednesday 23 May 2007, Blue Swirl wrote:
> > > On 5/23/07, Paul Brook <paul@codesourcery.com> wrote:
> > > > I get fed up of having to re-implement a simple countdown timer for
> > > > every new board, so I've added a simple periodic timer implementation
> > > > to cvs (ptimer.c). Currently only the Arm PrimeCell based boards use
> > > > this, but I've a few other uses in the pipeline.
> > >
> > > Nice idea! On Sparc the timer can be configured to work in 64-bit
> > > mode, so could the ptimer_get/set_count be changed to use 64-bit
> > > values?
> I made the API change and converted Sparc timers. Looks like it works
> (guest clock runs normally), though there are the following messages
> on startup:
> FIXME: ptimer_set_limit with running timer
>
> Comments? Did I break something?

Code looks reasonable to me.  The FIXME means you're changing the timer 
parameters after starting the timer. I didn't check whether this does 
anything sensible (this may depend on the device), hence the message.
It probably needs some attention when reload == 1 && s->enabled.

Note that save/restore is not implemented.  You may wish to implement this 
before applying your changes.  This doesn't effect the Arm targets because 
they can't save/restore at all.

Paul