From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1I21B2-0001C9-Ss for qemu-devel@nongnu.org; Sat, 23 Jun 2007 04:41:04 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1I21B2-0001Br-5T for qemu-devel@nongnu.org; Sat, 23 Jun 2007 04:41:04 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1I21B1-0001Bo-SV for qemu-devel@nongnu.org; Sat, 23 Jun 2007 04:41:03 -0400 Received: from smithers.debconf.org ([82.195.75.76]) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1I21B1-0002FZ-Dv for qemu-devel@nongnu.org; Sat, 23 Jun 2007 04:41:03 -0400 Date: Sat, 23 Jun 2007 09:41:11 +0100 Subject: Re: [Qemu-devel] [PATCH, MIPS64] Implement per CPU SEGBITS value Message-ID: <20070623084110.GA9170@networkno.de> References: <20070613183940.GC25272@amd64.aurel32.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070613183940.GC25272@amd64.aurel32.net> From: Thiemo Seufer Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aurelien Jarno Cc: qemu-devel@nongnu.org Aurelien Jarno wrote: > Hi! > > The current MIPS64 implementation assumes SEGBITS = 40 for all CPU. This > is correct for most CPU, but wrong for example for the 5K one, which has > SEGBITS = 42. > > This patch modifies the current code to use SEGBITS instead of an > hardcoded value. Instead of recomputing the corresponding mask each time > the value is computed in translate_init and stored in env. Looks good, except that it breaks for me mips64el-softmmu... It hangs at the startup of userland. Thiemo