From: Thiemo Seufer <ths@networkno.de>
To: Aurelien Jarno <aurelien@aurel32.net>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH, MIPS] Code translation improvement
Date: Mon, 25 Jun 2007 18:46:14 +0100 [thread overview]
Message-ID: <20070625174614.GB3665@networkno.de> (raw)
In-Reply-To: <20070615040008.GA4156@amd64.aurel32.net>
Aurelien Jarno wrote:
> Hi,
>
> The patch below makes a few improvement to the code translation, and fixes
> a small bug:
>
> - The check for the bit ERL in CP0 Status register implies that the CPU
> is in kernel mode, so there is no need to further check for user mode.
Applied.
> - Checking for the bit UM in CP0 Status register is not enough to detect
> the user mode, the patch below changes that to a check for
> MIPS_HFLAG_UM in hflags.
Applied.
> - Currently checking if CP0 is accessible, ie either the CPU is in kernel
> mode or the bit CU0 in CP0 Status register enabled, is done in the
> translated code. The patch below moves the check for user mode at
> translation time to improve a bit the execution time. It also saves a
> call to save_cpu_state() if the CPU is in kernel mode. A few CP0
> instructions then needs to explicitely save the cpu state, as they
> are modifying hflags.
This part breaks my standard Linux boot test. In general the idea is
sound, though.
Thiemo
prev parent reply other threads:[~2007-06-25 17:46 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-06-15 4:00 [Qemu-devel] [PATCH, MIPS] Code translation improvement Aurelien Jarno
2007-06-25 17:46 ` Thiemo Seufer [this message]
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