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From: Ulrich Hecht <uli@suse.de>
Subject: Re: [Qemu-devel] [PATCH] ARM (Thumb) read from R15
Date: Thu, 28 Jun 2007 17:53:27 +0200
References: <200706281631.32640.uli@suse.de> <200706281730.45680.uli@suse.de>
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To: qemu-devel@nongnu.org

On Thursday 28 June 2007 17:30, Ulrich Hecht wrote:
> On Thursday 28 June 2007 16:31, Ulrich Hecht wrote:
> > QEMU does not set the Thumb bit when reading from R15 in Thumb mode.
> > Here's the fix:
>
> Maybe not; this seems to break some cases ... :(

This works in all my cases, although I am not sure if it is correct:

Index: target-arm/translate.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
RCS file: /sources/qemu/qemu/target-arm/translate.c,v
retrieving revision 1.53
diff -u -r1.53 translate.c
--- target-arm/translate.c      11 Jun 2007 18:59:35 -0000      1.53
+++ target-arm/translate.c      28 Jun 2007 15:48:59 -0000
@@ -307,7 +307,7 @@
     if (reg =3D=3D 15) {
         /* normaly, since we updated PC, we need only to add one insn */
         if (s->thumb)
-            val =3D (long)s->pc + 2;
+            val =3D (long)s->pc + 3;
         else
             val =3D (long)s->pc + 4;
         gen_op_movl_TN_im[t](val);
@@ -3062,7 +3062,10 @@
                     gen_op_movl_T1_im(val);
                     gen_movl_reg_T1(s, 14);
                 }
-                gen_movl_T0_reg(s, rm);
+                if (rm =3D=3D 15)
+                  gen_op_movl_T0_im(s->pc + 2);
+                else
+                  gen_movl_T0_reg(s, rm);
                 gen_bx(s);
                 break;
             }

CU
Uli

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