From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1I5Jpt-0001Qn-4b for qemu-devel@nongnu.org; Mon, 02 Jul 2007 07:12:53 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1I5Jpr-0001Qb-IJ for qemu-devel@nongnu.org; Mon, 02 Jul 2007 07:12:52 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1I5Jpr-0001QY-D9 for qemu-devel@nongnu.org; Mon, 02 Jul 2007 07:12:51 -0400 Received: from mx2.suse.de ([195.135.220.15]) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1I5Jpr-0006wM-0p for qemu-devel@nongnu.org; Mon, 02 Jul 2007 07:12:51 -0400 Received: from Relay2.suse.de (mail2.suse.de [195.135.221.8]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 9609C21787 for ; Mon, 2 Jul 2007 13:12:40 +0200 (CEST) From: Ulrich Hecht Subject: Re: [Qemu-devel] [PATCH] ARM (Thumb) read from R15 Date: Mon, 2 Jul 2007 13:12:39 +0200 References: <200706281631.32640.uli@suse.de> <200706300319.58521.paul@codesourcery.com> In-Reply-To: <200706300319.58521.paul@codesourcery.com> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Disposition: inline Message-Id: <200707021312.40022.uli@suse.de> Content-Transfer-Encoding: quoted-printable Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Saturday 30 June 2007 04:19, Paul Brook wrote: > > QEMU does not set the Thumb bit when reading from R15 in Thumb mode. > > Neither does real hardware. You are, unsurprisingly, right. The problem seems to be a different one.=20 Quoting the ARM on "pop pc": "In ARM architecture 5 and above, bit[0] of the loaded value determines=20 whether execution continues after this branch in ARM state or in Thumb=20 state[...] In T variants of architecture version 4, bit[0] of the loaded=20 value is ignored and execution continues in Thumb state[...]" My code is supposed to run on a 4T. I guess I'll have to implement an=20 ARM_FEATURE_THUMB1. CU Uli --=20 SUSE LINUX Products GmbH, GF: Markus Rex, HRB 16746 (AG N=FCrnberg)