From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43)
	id 1I5LmX-0006Uf-Vu
	for qemu-devel@nongnu.org; Mon, 02 Jul 2007 09:17:34 -0400
Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43)
	id 1I5LmV-0006TK-No
	for qemu-devel@nongnu.org; Mon, 02 Jul 2007 09:17:32 -0400
Received: from [199.232.76.173] (helo=monty-python.gnu.org)
	by lists.gnu.org with esmtp (Exim 4.43) id 1I5LmV-0006T2-GR
	for qemu-devel@nongnu.org; Mon, 02 Jul 2007 09:17:31 -0400
Received: from mail.codesourcery.com ([65.74.133.4])
	by monty-python.gnu.org with esmtps
	(TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60)
	(envelope-from <paul@codesourcery.com>) id 1I5LmU-0001j4-W6
	for qemu-devel@nongnu.org; Mon, 02 Jul 2007 09:17:31 -0400
From: Paul Brook <paul@codesourcery.com>
Subject: Re: [Qemu-devel] [PATCH] ARM (Thumb) read from R15
Date: Mon, 2 Jul 2007 14:17:23 +0100
References: <200706281631.32640.uli@suse.de>
	<200706300319.58521.paul@codesourcery.com>
	<200707021312.40022.uli@suse.de>
In-Reply-To: <200707021312.40022.uli@suse.de>
MIME-Version: 1.0
Content-Type: text/plain;
  charset="iso-8859-1"
Content-Transfer-Encoding: 7bit
Content-Disposition: inline
Message-Id: <200707021417.25887.paul@codesourcery.com>
Reply-To: qemu-devel@nongnu.org
List-Id: qemu-devel.nongnu.org
List-Unsubscribe: <http://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.gnu.org/pipermail/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <http://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: qemu-devel@nongnu.org

On Monday 02 July 2007, Ulrich Hecht wrote:
> On Saturday 30 June 2007 04:19, Paul Brook wrote:
> > > QEMU does not set the Thumb bit when reading from R15 in Thumb mode.
> >
> > Neither does real hardware.
>
> You are, unsurprisingly, right. The problem seems to be a different one.
> Quoting the ARM on "pop pc":
>
> "In ARM architecture 5 and above, bit[0] of the loaded value determines
> whether execution continues after this branch in ARM state or in Thumb
> state[...] In T variants of architecture version 4, bit[0] of the loaded
> value is ignored and execution continues in Thumb state[...]"
>
> My code is supposed to run on a 4T. I guess I'll have to implement an
> ARM_FEATURE_THUMB1.

As you have found out, qemu doesn't currently emulate v4t. There are a couple 
of other instructions that should be disabled (blx) if you do this.

Paul