From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1IOZDY-0002H2-Sd for qemu-devel@nongnu.org; Fri, 24 Aug 2007 09:28:52 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1IOZDX-0002FA-Qp for qemu-devel@nongnu.org; Fri, 24 Aug 2007 09:28:52 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1IOZDX-0002Dy-CM for qemu-devel@nongnu.org; Fri, 24 Aug 2007 09:28:51 -0400 Received: from csl.cornell.edu ([128.84.224.10] helo=vlsi.csl.cornell.edu) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1IOZDV-0006z1-38 for qemu-devel@nongnu.org; Fri, 24 Aug 2007 09:28:49 -0400 Received: from bell.csl.cornell.edu (bell.csl.cornell.edu [128.84.224.41]) by vlsi.csl.cornell.edu (8.13.4/8.13.4) with ESMTP id l7ODShYK028709 for ; Fri, 24 Aug 2007 09:28:48 -0400 (EDT) Date: Fri, 24 Aug 2007 09:28:43 -0400 (EDT) From: Vince Weaver Subject: Re: [Qemu-devel] sh4 mov.b fix In-Reply-To: <20070824014945.A98528-200000@bell.csl.cornell.edu> Message-ID: <20070824092617.Y99366-100000@bell.csl.cornell.edu> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org > I think this patch is needed for proper implementation of > the sh4 mov.b @(disp,Rm),R0 instruction. and of course, I managed to send a reversed patch. That will teach me to send out things like that late at night. Here's the proper patch. Vince --- ./qemu-snapshot-2007-08-14_05/target-sh4/translate.c.orig 2007-08-24 01:37:56.000000000 -0400 +++ ./qemu-snapshot-2007-08-14_05/target-sh4/translate.c 2007-08-24 01:48:47.000000000 -0400 @@ -879,10 +879,10 @@ gen_op_stw_T0_T1(ctx); return; case 0x8400: /* mov.b @(disp,Rn),R0 */ - gen_op_movl_rN_T0(REG(0)); - gen_op_movl_rN_T1(REG(B7_4)); - gen_op_addl_imm_T1(B3_0); - gen_op_stb_T0_T1(ctx); + gen_op_movl_rN_T0(REG(B7_4)); + gen_op_addl_imm_T0(B3_0); + gen_op_ldb_T0_T0(ctx); + gen_op_movl_T0_rN(REG(0)); return; case 0x8500: /* mov.w @(disp,Rn),R0 */ gen_op_movl_rN_T0(REG(B7_4));