From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1IUOQI-00023R-SN for qemu-devel@nongnu.org; Sun, 09 Sep 2007 11:10:06 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1IUOQG-00022I-Fb for qemu-devel@nongnu.org; Sun, 09 Sep 2007 11:10:05 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1IUOQG-00022F-At for qemu-devel@nongnu.org; Sun, 09 Sep 2007 11:10:04 -0400 Received: from phoenix.bawue.net ([193.7.176.60] helo=mail.bawue.net) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1IUOQF-0003yX-TP for qemu-devel@nongnu.org; Sun, 09 Sep 2007 11:10:04 -0400 Date: Sun, 9 Sep 2007 16:04:15 +0100 From: Thiemo Seufer Subject: Re: [Qemu-devel] [PATCH] Intel cache info Message-ID: <20070909150415.GA10713@networkno.de> References: <5b31733c0709081227w3e5f1036odbc649edfdc8c79b@mail.gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <5b31733c0709081227w3e5f1036odbc649edfdc8c79b@mail.gmail.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Filip Navara Cc: qemu-devel@nongnu.org Filip Navara wrote: > Fix the CPUID function 2 to correctly report cache info for the particular > processor. I chose the values closest to the ones reported in the AMD > registers. This is important for operating systems that detect cache line > width and later call CLFLUSH for each line. In the previous implementation > the values didn't specify L2 cache line width and so Darwin endlessly looped > trying to flush them. No patch attached. Thiemo