From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1IUms8-0006TY-O5 for qemu-devel@nongnu.org; Mon, 10 Sep 2007 13:16:28 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1IUms6-0006TM-Co for qemu-devel@nongnu.org; Mon, 10 Sep 2007 13:16:27 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1IUms6-0006TJ-5M for qemu-devel@nongnu.org; Mon, 10 Sep 2007 13:16:26 -0400 Received: from mail.shareable.org ([81.29.64.88]) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1IUms5-0003BI-On for qemu-devel@nongnu.org; Mon, 10 Sep 2007 13:16:26 -0400 Received: from mail.shareable.org (localhost [127.0.0.1]) by mail.shareable.org (8.12.11.20060308/8.12.11) with ESMTP id l8AHGOTl019771 for ; Mon, 10 Sep 2007 18:16:24 +0100 Received: (from jamie@localhost) by mail.shareable.org (8.12.11.20060308/8.12.8/Submit) id l8AHGOgm019769 for qemu-devel@nongnu.org; Mon, 10 Sep 2007 18:16:24 +0100 Date: Mon, 10 Sep 2007 18:16:24 +0100 From: Jamie Lokier Subject: Re: [Qemu-devel] expose host CPU features to guests: Take 2 Message-ID: <20070910171624.GB1825@mail.shareable.org> References: <20070905174530.GA3945@karma.qumranet.com> <20070910074005.GA26869@karma.qumranet.com> <20070910120125.GA31345@karma.qumranet.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20070910120125.GA31345@karma.qumranet.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Dan Kenigsberg wrote: > On Mon, Sep 10, 2007 at 12:47:51PM +0100, Natalia Portillo wrote: > > I don't see in what is it useful without KVM/KQEMU. > > It is not. I tried to be clear about it in my post. Sorry for not being > clearer. Some day it may be useful without KVM/KQEMU, but not for a long time. There are instructions, for example MMX/SSE, which might be translated efficiently to single instructions on some host CPUs but to long function calls on others. But that won't happen until the translation back end is quite a lot more sophisticated than it is now. -- Jamie