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* [Qemu-devel] Another MIPS quiet NaN fix
@ 2007-09-24 13:37 Daniel Jacobowitz
  2007-09-24 14:05 ` Andreas Schwab
  0 siblings, 1 reply; 3+ messages in thread
From: Daniel Jacobowitz @ 2007-09-24 13:37 UTC (permalink / raw)
  To: qemu-devel

Glibc's test-float failed on my qemu testing.  I tracked it down to
these routines: if you count the bits carefully, you'll see that
0x7FC00000 sets the quiet NaN bit (on most hardware - signalling NaN
in the MIPS case); so does a.high >> 41, which copies it from the
original NaN.  I think this routine should not force a quiet or
signalling NaN, but just preserve the input NaN's signalling-ness.

With the patch below, everything passes.  cvt.d.s still produces an
ugly pattern different from the one real hardware produces when
converting a single-precision NaN to double; but now it's a quiet
NaN if the input was a quiet NaN so exp10(NaN) no longer raises
Invalid.

-- 
Daniel Jacobowitz
CodeSourcery

--- fpu/softfloat-specialize.h	(revision 182529)
+++ fpu/softfloat-specialize.h	(local)
@@ -120,9 +120,7 @@ static commonNaNT float32ToCommonNaN( fl
 
 static float32 commonNaNToFloat32( commonNaNT a )
 {
-
-    return ( ( (bits32) a.sign )<<31 ) | 0x7FC00000 | ( a.high>>41 );
-
+    return ( ( (bits32) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 );
 }
 
 /*----------------------------------------------------------------------------
@@ -233,7 +231,7 @@ static float64 commonNaNToFloat64( commo
 
     return
           ( ( (bits64) a.sign )<<63 )
-        | LIT64( 0x7FF8000000000000 )
+        | LIT64( 0x7FF0000000000000 )
         | ( a.high>>12 );
 
 }

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [Qemu-devel] Another MIPS quiet NaN fix
  2007-09-24 13:37 [Qemu-devel] Another MIPS quiet NaN fix Daniel Jacobowitz
@ 2007-09-24 14:05 ` Andreas Schwab
  2007-09-24 15:45   ` Daniel Jacobowitz
  0 siblings, 1 reply; 3+ messages in thread
From: Andreas Schwab @ 2007-09-24 14:05 UTC (permalink / raw)
  To: qemu-devel

Daniel Jacobowitz <drow@false.org> writes:

> Glibc's test-float failed on my qemu testing.  I tracked it down to
> these routines: if you count the bits carefully, you'll see that
> 0x7FC00000 sets the quiet NaN bit (on most hardware - signalling NaN
> in the MIPS case); so does a.high >> 41, which copies it from the
> original NaN.  I think this routine should not force a quiet or
> signalling NaN, but just preserve the input NaN's signalling-ness.

You may need to make sure that at least one mantissa bit is set.

Andreas.

-- 
Andreas Schwab, SuSE Labs, schwab@suse.de
SuSE Linux Products GmbH, Maxfeldstraße 5, 90409 Nürnberg, Germany
PGP key fingerprint = 58CA 54C7 6D53 942B 1756  01D3 44D5 214B 8276 4ED5
"And now for something completely different."

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [Qemu-devel] Another MIPS quiet NaN fix
  2007-09-24 14:05 ` Andreas Schwab
@ 2007-09-24 15:45   ` Daniel Jacobowitz
  0 siblings, 0 replies; 3+ messages in thread
From: Daniel Jacobowitz @ 2007-09-24 15:45 UTC (permalink / raw)
  To: qemu-devel

On Mon, Sep 24, 2007 at 04:05:45PM +0200, Andreas Schwab wrote:
> Daniel Jacobowitz <drow@false.org> writes:
> 
> > Glibc's test-float failed on my qemu testing.  I tracked it down to
> > these routines: if you count the bits carefully, you'll see that
> > 0x7FC00000 sets the quiet NaN bit (on most hardware - signalling NaN
> > in the MIPS case); so does a.high >> 41, which copies it from the
> > original NaN.  I think this routine should not force a quiet or
> > signalling NaN, but just preserve the input NaN's signalling-ness.
> 
> You may need to make sure that at least one mantissa bit is set.

I think - but am not quite sure - that this will already be the case
because the NaN will have come from some other NaN representation.
Good point, though - we can easily set the next bit, as long as we
don't fiddle with the signalling bit.

-- 
Daniel Jacobowitz
CodeSourcery

^ permalink raw reply	[flat|nested] 3+ messages in thread

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2007-09-24 13:37 [Qemu-devel] Another MIPS quiet NaN fix Daniel Jacobowitz
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