From: Daniel Jacobowitz <drow@false.org>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] about cache model in ARM emulation
Date: Thu, 18 Oct 2007 10:09:34 -0400 [thread overview]
Message-ID: <20071018140934.GA11519@caradoc.them.org> (raw)
In-Reply-To: <533915.11425.qm@web37011.mail.mud.yahoo.com>
On Thu, Oct 18, 2007 at 06:57:19AM -0700, Boy Dfx wrote:
> From what I can see instructions are loaded from memory without a
> clock cycle penalty, but I wanted to be sure.
Yes. Qemu is absolutely useless for performance questions about
real hardware; it does not model any cycles.
--
Daniel Jacobowitz
CodeSourcery
prev parent reply other threads:[~2007-10-18 14:09 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-10-18 13:57 [Qemu-devel] about cache model in ARM emulation Boy Dfx
2007-10-18 14:09 ` Daniel Jacobowitz [this message]
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