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Date: Sat, 27 Oct 2007 14:08:15 +0100
From: Thiemo Seufer <ths@networkno.de>
Subject: Re: [Qemu-devel] Mips 64 emulation not compiling
Message-ID: <20071027130815.GJ29176@networkno.de>
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	<20071027111939.GH29176@networkno.de>
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To: "J. Mayer" <l_indien@magic.fr>
Cc: qemu-devel <qemu-devel@nongnu.org>

J. Mayer wrote:
> 
> On Sat, 2007-10-27 at 12:19 +0100, Thiemo Seufer wrote:
> > J. Mayer wrote:
> > > The latest patches in clo makes gcc 3.4.6 fail to build the mips64
> > > targets on my amd64 host (looks like an register allocation clash in the
> > > optimizer code).
> > 
> > Your version is likely faster as well.
> > 
> > > Furthermore, the clz micro-op for Mips seems very suspect to me,
> > > according to the changes made in the clo implementation.
> > 
> > It is correct, the sign-extension are zero in that case.
> 
> OK, you know better than me...
> 
> > > I did change the clz / clo implementation to use the same code as the
> > > one used for the PowerPC implementation. It seems to me that the result
> > > would be correct... And it compiles...
> > > 
> > > Please take a look to the folowing patch:
> > 
> > We have now clz/clo in several places, so I expanded your patch a
> > bit. For now it is only used for the mips target. Comments?
> 
> I fully aggree with the idea of sharing this code, if it's OK according
> to all targets specifications. Please commit and I'll update PowerPC and
> Alpha target to use them.
> Oh, I did an optimisation for clz64 used on 32 bits host, avoiding use
> of 64 bits logical operations:

[snip: a lot more nifty things]
> If you prefer, I can add those shared functions (ctz32, ctz64, cto32,
> cto64, ctpop32, ctpop64) later, as they do not seem as widely used as
> clxxx functions.

For now I just committed the patch. Feel free to enhance it as you
see fit. :-)


Thiemo