From: Paul Brook <paul@codesourcery.com>
To: qemu-devel@nongnu.org
Cc: Blue Swirl <blauwirbel@gmail.com>
Subject: Re: [Qemu-devel] [PATCH] sparc32 boot mode flag fix
Date: Tue, 6 Nov 2007 20:39:10 +0000 [thread overview]
Message-ID: <200711062039.12196.paul@codesourcery.com> (raw)
In-Reply-To: <f43fc5580711061131s29b0d0bbt5f5a5967cc37498d@mail.gmail.com>
> > This patch also removes the MMU flags from being saved in the
> > translation block code as a result of an off line discussion with Paul
> > Brook.
>
> I'd like to hear the reasoning behind that. The TBs generated while in
> boot mode and MMU disabled may contain translations generated from
> virtual to physical mappings that do not exist when the mode is
> changed. Boot mode and MMU disable are not used after boot and these
> bits don't affect translation, so those bits may be less important and
> not worth the few bits in TB flags.
It think you're confusing the TB cache with the TLB. Each TB is already
indexed by both physical and virtual address (explicitly in tb_find_slow, and
implicitly in tb_find_fast because a tlb flush clears env->tb_jmp_cache).
IIUC enabling/disabling boot mode is no different to and other VM change. If
the virtual->physical mapping happens to be the same then it's perfectly ok
to reuse the TB.
The TLB is already flushed whenever the MMU mode is changes. There is no need
to invalidate the TB.
Paul
next prev parent reply other threads:[~2007-11-06 20:39 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-11-06 2:45 [Qemu-devel] [PATCH] sparc32 boot mode flag fix Robert Reif
2007-11-06 19:31 ` Blue Swirl
2007-11-06 20:39 ` Paul Brook [this message]
2007-11-06 20:51 ` Blue Swirl
2007-11-06 21:08 ` Paul Brook
2007-11-07 15:40 ` Blue Swirl
2007-11-06 23:36 ` Robert Reif
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