From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Ipu47-0004Kt-Pb for qemu-devel@nongnu.org; Wed, 07 Nov 2007 18:12:07 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Ipu46-0004Jw-DX for qemu-devel@nongnu.org; Wed, 07 Nov 2007 18:12:07 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Ipu46-0004Jt-5t for qemu-devel@nongnu.org; Wed, 07 Nov 2007 18:12:06 -0500 Received: from nan.false.org ([208.75.86.248]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1Ipu45-0006Y6-Rx for qemu-devel@nongnu.org; Wed, 07 Nov 2007 18:12:06 -0500 Received: from nan.false.org (localhost [127.0.0.1]) by nan.false.org (Postfix) with ESMTP id 4338198353 for ; Wed, 7 Nov 2007 23:12:02 +0000 (GMT) Received: from caradoc.them.org (22.svnf5.xdsl.nauticom.net [209.195.183.55]) by nan.false.org (Postfix) with ESMTP id 2E1209833F for ; Wed, 7 Nov 2007 23:12:02 +0000 (GMT) Received: from drow by caradoc.them.org with local (Exim 4.68) (envelope-from ) id 1Ipu41-000116-Ar for qemu-devel@nongnu.org; Wed, 07 Nov 2007 18:12:01 -0500 Date: Wed, 7 Nov 2007 18:12:01 -0500 From: Daniel Jacobowitz Subject: Re: [Qemu-devel] [PATCH] Fix NaN handling in softfloat Message-ID: <20071107231201.GA3820@caradoc.them.org> References: <20071103173548.GA16847@hall.aurel32.net> <20071103180604.GA14403@caradoc.them.org> <20071103212816.GA31686@hall.aurel32.net> <1194379274.31210.100.camel@rapid> <20071107230525.GG19509@hall.aurel32.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20071107230525.GG19509@hall.aurel32.net> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Thu, Nov 08, 2007 at 12:05:25AM +0100, Aurelien Jarno wrote: > Has Thiemo already said, there is no IEEE behavior. If you look at the > IEEE 754 document you will see that it has requirements on what should > be supported by an IEEE compliant FPU, but has very few requirements on > the implementation. If folks don't like the target conditionals there, I recommend we just set some low bit to be sure it's a NaN and move on. The softfloat implementation is not all that close to matching any one hardware FPU. -- Daniel Jacobowitz CodeSourcery